clk: sunxi: Add Allwinner H3/H5 CLK driver
Add initial clock driver for Allwinner H3/H5.
- Implement USB bus and USB clocks via ccu_clk_gate table for
H3/H5, so it can accessed in common clk enable and disable
functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table for
H3/H5, so it can accessed in common reset deassert and assert
functions from reset-sunxi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index fb20d28..dec49f2 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -6,4 +6,5 @@
obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o
+obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o