commit ecc8d425fd50d894dd0a06796c17030ef4a7942f
author Tom Rini <trini@konsulko.com> Wed Nov 16 13:10:33 2022 -0500
committer Tom Rini <trini@konsulko.com> Mon Dec 05 16:06:07 2022 -0500
tree 6fade563d93ccb2dc3c774bdcc3d2f5cf5b6403c
parent 789bb9537a4427798e3e28ff0c6be2c27454315f

global: Move remaining CONFIG_SYS_PCI* to CFG_SYS_PCI*

The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_PCI and
CONFIG_SYS_PCIE namespace do not easily transition to Kconfig. In many
cases they likely should come from the device tree instead. Move these
out of CONFIG namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

include/configs/T104xRDB.h

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index a3d0488..423ba81 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -307,30 +307,30 @@
 #ifdef CONFIG_PCI
 /* controller 1, direct to uli, tgtid 3, Base address 20000 */
 #ifdef CONFIG_PCIE1
-#define	CONFIG_SYS_PCIE1_MEM_VIRT	0x80000000
-#define	CONFIG_SYS_PCIE1_MEM_PHYS	0xc00000000ull
-#define CONFIG_SYS_PCIE1_IO_VIRT	0xf8000000
-#define CONFIG_SYS_PCIE1_IO_PHYS	0xff8000000ull
+#define	CFG_SYS_PCIE1_MEM_VIRT	0x80000000
+#define	CFG_SYS_PCIE1_MEM_PHYS	0xc00000000ull
+#define CFG_SYS_PCIE1_IO_VIRT	0xf8000000
+#define CFG_SYS_PCIE1_IO_PHYS	0xff8000000ull
 #endif
 
 /* controller 2, Slot 2, tgtid 2, Base address 201000 */
 #ifdef CONFIG_PCIE2
-#define CONFIG_SYS_PCIE2_MEM_VIRT	0x90000000
-#define CONFIG_SYS_PCIE2_MEM_PHYS	0xc10000000ull
-#define CONFIG_SYS_PCIE2_IO_VIRT	0xf8010000
-#define CONFIG_SYS_PCIE2_IO_PHYS	0xff8010000ull
+#define CFG_SYS_PCIE2_MEM_VIRT	0x90000000
+#define CFG_SYS_PCIE2_MEM_PHYS	0xc10000000ull
+#define CFG_SYS_PCIE2_IO_VIRT	0xf8010000
+#define CFG_SYS_PCIE2_IO_PHYS	0xff8010000ull
 #endif
 
 /* controller 3, Slot 1, tgtid 1, Base address 202000 */
 #ifdef CONFIG_PCIE3
-#define CONFIG_SYS_PCIE3_MEM_VIRT	0xa0000000
-#define CONFIG_SYS_PCIE3_MEM_PHYS	0xc20000000ull
+#define CFG_SYS_PCIE3_MEM_VIRT	0xa0000000
+#define CFG_SYS_PCIE3_MEM_PHYS	0xc20000000ull
 #endif
 
 /* controller 4, Base address 203000 */
 #ifdef CONFIG_PCIE4
-#define CONFIG_SYS_PCIE4_MEM_VIRT	0xb0000000
-#define CONFIG_SYS_PCIE4_MEM_PHYS	0xc30000000ull
+#define CFG_SYS_PCIE4_MEM_VIRT	0xb0000000
+#define CFG_SYS_PCIE4_MEM_PHYS	0xc30000000ull
 #endif
 #endif	/* CONFIG_PCI */