| commit | ed32522fe048f9edcb3269c8d5af79c6e8c6daea | [log] [tgz] |
|---|---|---|
| author | Akshay Saraswat <akshay.s@samsung.com> | Mon May 26 19:20:08 2014 +0530 |
| committer | Minkyu Kang <mk7.kang@samsung.com> | Fri Jun 13 17:05:14 2014 +0900 |
| tree | 61a005141819f84aa56f8588f87cc78f575f42d6 | |
| parent | c9334fcda90652e2f8c49f4517b728ebc6f5f623 [diff] |
Exynos5420: DMC: Add software read leveling Sometimes Read DQ and DQS are not in phase. Since, this phase shift differs from board to board, we need to calibrate it at DRAM init phase, that's read DQ calibration. This patch adds SW Read DQ calibration routine to compensate this skew. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>