| commit | ed77ce728aa2cd2c8b1c01ec3a0f2efb8f3edc26 | [log] [tgz] |
|---|---|---|
| author | Jagan Teki <jagan@amarulasolutions.com> | Tue Jul 16 17:27:05 2019 +0530 |
| committer | Kever Yang <kever.yang@rock-chips.com> | Sat Jul 20 23:59:44 2019 +0800 |
| tree | 8f8d68058f52b3f4c45af86fd7e24f477efb9bc9 | |
| parent | b713e0291ba90847058678ae2752f08f238c8fe3 [diff] |
ram: rk3399: Add ddrtimingC0 Add DdrTimingC0 structure with associated bit fields. These would help to reconfigure sdram capabilities during lpddr4 setup related configs. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>