| commit | ef083ecf90ffd174baf99e0f77e7dd99959ff21e | [log] [tgz] |
|---|---|---|
| author | Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> | Wed Feb 13 12:18:28 2019 +0900 |
| committer | Marek Vasut <marex@denx.de> | Mon Mar 04 01:46:05 2019 +0100 |
| tree | 261f393c7275a3375b4a49998f6488f52b2b4261 | |
| parent | 8b5e96d80a1e087db981ec2b4861976290b670ad [diff] |
pinctrl: renesas: r8a77990: Fix MOD_SEL0 bit2 when using RX2,TX2 and SCK2
According to the R-Car Gen3 Hardware Manual Rev 1.50, the MOD_SEL0
bit2 is set when RX2_{A,B}, TX2_{A,B} and SCK2_A pin functions are
selected.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>