microblaze: cache: improve dcache Kconfig options
Replace CONFIG_DCACHE with a Kconfig option more limited in scope -
XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports
the "wdc" (Write to Data Cache) instruction. It will be used to guard
"wdc" invocations in microblaze cache code.
Also, drop all ifdefs around flush_cache() calls and only keep one
CONFIG_IS_ENABLED() guard within flush_cache() itself.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 6f45d19..11ccbcc 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -39,10 +39,6 @@
endchoice
-config DCACHE
- bool "Enable dcache support"
- default y
-
config ICACHE
bool "Enable icache support"
default y
diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c
index b6126de..4e8e228 100644
--- a/arch/microblaze/cpu/cache.c
+++ b/arch/microblaze/cpu/cache.c
@@ -49,26 +49,31 @@
void dcache_disable(void)
{
-#ifdef CONFIG_DCACHE
flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
-#endif
+
MSRCLR(0x80);
}
void flush_cache(ulong addr, ulong size)
{
int i;
- for (i = 0; i < size; i += 4)
+ for (i = 0; i < size; i += 4) {
asm volatile (
#ifdef CONFIG_ICACHE
"wic %0, r0;"
#endif
"nop;"
-#ifdef CONFIG_DCACHE
+ :
+ : "r" (addr + i)
+ : "memory");
+
+ if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WDC)) {
+ asm volatile (
"wdc.flush %0, r0;"
-#endif
"nop;"
:
: "r" (addr + i)
: "memory");
+ }
+ }
}
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index b652d27..dba6226 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -57,9 +57,7 @@
"(fake run for tracing)" : "");
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
-#ifdef CONFIG_DCACHE
flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
-#endif
if (!fake) {
/*
diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig
index 117b476..b00ce6f 100644
--- a/board/xilinx/microblaze-generic/Kconfig
+++ b/board/xilinx/microblaze-generic/Kconfig
@@ -63,4 +63,15 @@
Memory address location of the exception vector table. It is
configurable via the C_BASE_VECTORS hdl parameter.
+config XILINX_MICROBLAZE0_USE_WDC
+ bool "MicroBlaze wdc instruction support"
+ default y
+ help
+ Enable this option if the MicroBlaze processor is configured with
+ support for the "wdc" (Write to Data Cache) instruction.
+
+config SPL_XILINX_MICROBLAZE0_USE_WDC
+ bool
+ default XILINX_MICROBLAZE0_USE_WDC
+
endif