| commit | f3ac866c78f7f0d91eb345967350830d46c3a563 | [log] [tgz] |
|---|---|---|
| author | Paul Burton <paul.burton@imgtec.com> | Fri Nov 08 11:18:45 2013 +0000 |
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | Sat Nov 09 17:21:01 2013 +0100 |
| tree | 2525f245b31a8988cd5db6dab83dd9022bcc9793 | |
| parent | a95400411b0938b1ef6d87090f4b22026c56e55b [diff] |
pcnet: add cache flushing & invalidation Ensure that the view of memory from the CPU & the ethernet controller is coherent at the various points where they exchange data. This prevents stale data from being transmitted or received, and prevents the driver from getting stuck waiting for the ethernet controller to update descriptors when in reality it has but the old values are being read from cache. Signed-off-by: Paul Burton <paul.burton@imgtec.com>