commit | f45e747d6d0b107992e8aed74c001034c8a6f1a1 | [log] [tgz] |
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author | Simon Glass <sjg@chromium.org> | Fri Dec 06 21:42:25 2019 -0700 |
committer | Bin Meng <bmeng.cn@gmail.com> | Sun Dec 15 11:44:18 2019 +0800 |
tree | 8f39a274ed8a75083893cf1899d64f242ab11059 | |
parent | 2e2a0035d4ab520615fd13dc7c89a60a44eb6bc0 [diff] |
x86: Add support for newer CAR schemes Newer Intel SoCs have different ways of setting up cache-as-ram (CAR). Add support for these along with suitable configuration options. To make the code cleaner, adjust a few definitions in processor.h so that they can be used from assembler. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>