arm: mvebu: Don't call arch_cpu_init() from SPL at all
This patch removes the call to arch_cpu_init() in the SPL U-Boot version.
As SPL does not need all the configuration done in this function. And
also does not need the reconfiguration of the internal register
address to 0xf1000000. This will be done by the main U-Boot later on.
This also fixes a problem with the timer not beeing initialized on AXP,
as needed for the mdelay in the setup_usb_phys(). This will now only
be called once in main U-Boot.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index fd56c99..071b13b 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -220,9 +220,11 @@
}
}
+/*
+ * This function is not called from the SPL U-Boot version
+ */
int arch_cpu_init(void)
{
-#if !defined(CONFIG_SPL_BUILD)
struct pl310_regs *const pl310 =
(struct pl310_regs *)CONFIG_SYS_PL310_BASE;
@@ -233,13 +235,11 @@
* still locked to cache.
*/
mmu_disable();
-#endif
/* Linux expects the internal registers to be at 0xf1000000 */
writel(SOC_REGS_PHY_BASE, INTREG_BASE_ADDR_REG);
set_cbar(SOC_REGS_PHY_BASE + 0xC000);
-#if !defined(CONFIG_SPL_BUILD)
/*
* From this stage on, the SoC detection is working. As we have
* configured the internal register base to the value used
@@ -253,7 +253,6 @@
icache_disable();
dcache_disable();
clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
-#endif
/*
* We need to call mvebu_mbus_probe() before calling