clk: Add clock driver for AXG
This patch adds a minimal clock driver for the Amlogic AXG SoC to handle
the basic gates and PLLs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 821b586..a696245 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -9,7 +9,7 @@
obj-y += imx/
obj-y += tegra/
obj-$(CONFIG_ARCH_ASPEED) += aspeed/
-obj-$(CONFIG_ARCH_MESON) += clk_meson.o
+obj-$(CONFIG_ARCH_MESON) += clk_meson.o clk_meson_axg.o
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_ARCH_SOCFPGA) += altera/
obj-$(CONFIG_CLK_AT91) += at91/