riscv: Use a valid bit to ignore already-pending IPIs
Some IPIs may already be pending when U-Boot is started. This could be a
problem if a secondary hart tries to handle an IPI before the boot hart has
initialized the IPI device.
To be specific, the Kendryte K210 ROM-based bootloader does not clear IPIs
before passing control to U-Boot. Without this patch, the secondary hart
jumps to address 0x0 as soon as it enters secondary_hart_loop, and then
hangs in its trap handler.
This commit introduces a valid bit so secondary harts know when and IPI
originates from U-Boot, and it is safe to use the IPI API. The valid bit is
initialized to 0 by board_init_f_init_reserve. Before this, secondary harts
wait in wait_for_gd_init.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index 1b42885..2dae080 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -18,14 +18,21 @@
* IPI data structure. The hart ID is inserted by the hart handling the IPI and
* calling the function.
*
+ * @valid is used to determine whether a sent IPI originated from U-Boot. It is
+ * initialized to zero by board_init_f_alloc_reserve. When U-Boot sends its
+ * first IPI, it is set to 1. This prevents already-pending IPIs not sent by
+ * U-Boot from being taken.
+ *
* @addr: Address of function
* @arg0: First argument of function
* @arg1: Second argument of function
+ * @valid: Whether this IPI is valid
*/
struct ipi_data {
ulong addr;
ulong arg0;
ulong arg1;
+ unsigned int valid;
};
/**
diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c
index ab6d8bd..8f33ce1 100644
--- a/arch/riscv/lib/smp.c
+++ b/arch/riscv/lib/smp.c
@@ -54,7 +54,13 @@
gd->arch.ipi[reg].arg0 = ipi->arg0;
gd->arch.ipi[reg].arg1 = ipi->arg1;
- __smp_mb();
+ /*
+ * Ensure valid only becomes set when the IPI parameters are
+ * set. An IPI may already be pending on other harts, so we
+ * need a way to signal that the IPI device has been
+ * initialized, and that it is ok to call the function.
+ */
+ __smp_store_release(&gd->arch.ipi[reg].valid, 1);
ret = riscv_send_ipi(reg);
if (ret) {
@@ -83,7 +89,13 @@
if (hart >= CONFIG_NR_CPUS)
return;
- __smp_mb();
+ /*
+ * If valid is not set, then U-Boot has not requested the IPI. The
+ * IPI device may not be initialized, so all we can do is wait for
+ * U-Boot to initialize it and send an IPI
+ */
+ if (!__smp_load_acquire(&gd->arch.ipi[hart].valid))
+ return;
smp_function = (void (*)(ulong, ulong, ulong))gd->arch.ipi[hart].addr;
invalidate_icache_all();