commit f78ced3028d4130b24a318943a70cf5584ab16f4
author TsiChung Liew <Tsi-Chung.Liew@freescale.com> Tue Aug 19 00:26:25 2008 +0600
committer John Rigby <jrigby@freescale.com> Thu Aug 28 09:16:54 2008 -0600
tree 90d6650c2e4921f767ea648dec2c7abc8d247f53
parent 454e725b3a9537b7f273bbd0cbca180f23a7a6e8

ColdFire: Multiple fixes for MCF5445x platforms

Add FEC pin set and mii reset in __mii_init(). Change
legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
change cfi_offset to 0, and change CFG_FLASH_CFI to
CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
M54455EVB env settings in configuration file.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>

board/freescale/m54451evb/m54451evb.c

diff --git a/board/freescale/m54451evb/m54451evb.c b/board/freescale/m54451evb/m54451evb.c
index 5b33a83..768f40b 100644
--- a/board/freescale/m54451evb/m54451evb.c
+++ b/board/freescale/m54451evb/m54451evb.c
@@ -49,7 +49,7 @@
 	 * Serial Boot: The dram is already initialized in start.S
 	 * only require to return DRAM size
 	 */
-	dramsize = CFG_SDRAM_SIZE * 0x100000 >> 1;
+	dramsize = CFG_SDRAM_SIZE * 0x100000;
 #else
 	volatile sdramc_t *sdram = (volatile sdramc_t *)(MMAP_SDRAM);
 	volatile gpio_t *gpio = (volatile gpio_t *)(MMAP_GPIO);
@@ -67,7 +67,7 @@
 	}
 	i--;
 
-	gpio->mscr_sdram = 0x44;
+	gpio->mscr_sdram = CFG_SDRAM_DRV_STRENGTH;
 
 	sdram->sdcs0 = (CFG_SDRAM_BASE | i);
 

board/freescale/m54455evb/m54455evb.c

diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c
index 4f02121..100682a 100644
--- a/board/freescale/m54455evb/m54455evb.c
+++ b/board/freescale/m54455evb/m54455evb.c
@@ -171,7 +171,7 @@
 }
 #endif				/* CONFIG_PCI */
 
-#if defined(CFG_FLASH_CFI)
+#if defined(CONFIG_FLASH_CFI_LEGACY)
 #include <flash.h>
 ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
 {
@@ -189,7 +189,7 @@
 	info->erase_blk_tout    = 16384;
 	info->write_tout        = 2;
 	info->buffer_write_tout = 5;
-	info->vendor            = 2; /* CFI_CMDSET_AMD_STANDARD */
+	info->vendor            = 0xFFF0; /* CFI_CMDSET_AMD_LEGACY */
 	info->cmd_reset         = 0x00F0;
 	info->interface         = FLASH_CFI_X8;
 	info->legacy_unlock     = 0;
@@ -199,12 +199,11 @@
 
 	info->ext_addr          = 0;
 	info->cfi_version       = 0x3133;
-	info->cfi_offset        = 0x0055;
+	info->cfi_offset        = 0x0000;
 	info->addr_unlock1      = 0x00000555;
 	info->addr_unlock2      = 0x000002AA;
 	info->name              = "CFI conformant";
 
-
 	info->size              = 0;
 	info->sector_count      = CFG_ATMEL_TOTALSECT;
 	info->start[0] = base;

board/freescale/m54455evb/mii.c

diff --git a/board/freescale/m54455evb/mii.c b/board/freescale/m54455evb/mii.c
index 7a59aa0..0be5439 100644
--- a/board/freescale/m54455evb/mii.c
+++ b/board/freescale/m54455evb/mii.c
@@ -237,6 +237,10 @@
 
 	fecp = (fec_t *) info->miibase;
 
+	fecpin_setclear(dev, 1);
+
+	mii_reset(info);
+
 	/* We use strictly polling mode only */
 	fecp->eimr = 0;