dts: rk3399: add dwc3_typec node for rk3399
rk3399 has two dwc3 controller for type-C port, add the dts node
and enable them.
Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 6d82078..179860c 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#define USB_CLASS_HUB 9
/ {
compatible = "rockchip,rk3399";
@@ -230,6 +231,50 @@
status = "disabled";
};
+ dwc3_typec0: usb@fe800000 {
+ compatible = "rockchip,rk3399-xhci";
+ reg = <0x0 0xfe800000 0x0 0x100000>;
+ status = "disabled";
+ rockchip,vbus-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+ snps,dis-enblslpm-quirk;
+ snps,phyif-utmi-bits = <16>;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis-u2-susphy-quirk;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ hub {
+ compatible = "usb-hub";
+ usb,device-class = <USB_CLASS_HUB>;
+ };
+ typec_phy0 {
+ compatible = "rockchip,rk3399-usb3-phy";
+ reg = <0x0 0xff7c0000 0x0 0x40000>;
+ };
+ };
+
+ dwc3_typec1: usb@fe900000 {
+ compatible = "rockchip,rk3399-xhci";
+ reg = <0x0 0xfe900000 0x0 0x100000>;
+ status = "disabled";
+ rockchip,vbus-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+ snps,dis-enblslpm-quirk;
+ snps,phyif-utmi-bits = <16>;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis-u2-susphy-quirk;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ hub {
+ compatible = "usb-hub";
+ usb,device-class = <USB_CLASS_HUB>;
+ };
+ typec_phy1 {
+ compatible = "rockchip,rk3399-usb3-phy";
+ reg = <0x0 0xff800000 0x0 0x40000>;
+ };
+ };
+
gic: interrupt-controller@fee00000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;