clk/qcom: move ipq4019 driver from mach-ipq40xx
This driver is just a stub, but it's necessary to support the upcoming
reset driver changes.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index a884f07..0df0d18 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -23,6 +23,14 @@
on the Snapdragon APQ8096 SoC. This driver supports the clocks
and resets exposed by the GCC hardware block.
+config CLK_QCOM_IPQ4019
+ bool "Qualcomm IPQ4019 GCC"
+ select CLK_QCOM
+ help
+ Say Y here to enable support for the Global Clock Controller
+ on the Snapdragon IPQ4019 SoC. This driver supports the clocks
+ and resets exposed by the GCC hardware block.
+
config CLK_QCOM_QCS404
bool "Qualcomm QCS404 GCC"
select CLK_QCOM
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index 44d5558..cb179fd 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -6,4 +6,5 @@
obj-$(CONFIG_CLK_QCOM_SDM845) += clock-sdm845.o
obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o
obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o
+obj-$(CONFIG_CLK_QCOM_IPQ4019) += clock-ipq4019.o
obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o
diff --git a/drivers/clk/qcom/clock-ipq4019.c b/drivers/clk/qcom/clock-ipq4019.c
new file mode 100644
index 0000000..04c9996
--- /dev/null
+++ b/drivers/clk/qcom/clock-ipq4019.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Clock drivers for Qualcomm IPQ40xx
+ *
+ * Copyright (c) 2020 Sartura Ltd.
+ *
+ * Author: Robert Marko <robert.marko@sartura.hr>
+ *
+ */
+
+#include <clk-uclass.h>
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <dt-bindings/clock/qcom,ipq4019-gcc.h>
+
+#include "clock-qcom.h"
+
+ulong msm_set_rate(struct clk *clk, ulong rate)
+{
+ switch (clk->id) {
+ case GCC_BLSP1_UART1_APPS_CLK: /*UART1*/
+ /* This clock is already initialized by SBL1 */
+ return 0;
+ default:
+ return -EINVAL;
+ }
+}
+
+int msm_enable(struct clk *clk)
+{
+ switch (clk->id) {
+ case GCC_BLSP1_QUP1_SPI_APPS_CLK: /*SPI1*/
+ /* This clock is already initialized by SBL1 */
+ return 0;
+ case GCC_PRNG_AHB_CLK: /*PRNG*/
+ /* This clock is already initialized by SBL1 */
+ return 0;
+ case GCC_USB3_MASTER_CLK:
+ case GCC_USB3_SLEEP_CLK:
+ case GCC_USB3_MOCK_UTMI_CLK:
+ case GCC_USB2_MASTER_CLK:
+ case GCC_USB2_SLEEP_CLK:
+ case GCC_USB2_MOCK_UTMI_CLK:
+ /* These clocks is already initialized by SBL1 */
+ return 0;
+ default:
+ return -EINVAL;
+ }
+}
+
diff --git a/drivers/clk/qcom/clock-qcom.c b/drivers/clk/qcom/clock-qcom.c
index 5667abe..5914616 100644
--- a/drivers/clk/qcom/clock-qcom.c
+++ b/drivers/clk/qcom/clock-qcom.c
@@ -166,6 +166,7 @@
{ .compatible = "qcom,gcc-apq8016" },
{ .compatible = "qcom,gcc-msm8996" },
{ .compatible = "qcom,gcc-apq8096" },
+ { .compatible = "qcom,gcc-ipq4019" },
{ .compatible = "qcom,gcc-sdm845" },
{ .compatible = "qcom,gcc-qcs404" },
{ }