commit fc82edd8440721aadf3bfc784f29a513ad7680be
author Nathan Rossi <nathan@nathanrossi.com> Fri Jan 08 03:00:48 2016 +1000
committer Michal Simek <michal.simek@xilinx.com> Wed Jan 13 13:20:03 2016 +0100
tree 038d1122c95678ff1216150dca99c700e77ec9cd
parent 47c0d79edc35fdd959851abcb3332bd5e702d0eb

arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs

This feature is required in SPL to enable support for loading from SPI
flash.

Also clean up the #define in socfpga_common.h.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin-Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

configs/socfpga_sr1500_defconfig

diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index 3d98a63..a4f0835 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -6,6 +6,7 @@
 CONFIG_TARGET_SOCFPGA_SR1500=y
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
 CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 # CONFIG_CMD_IMLS is not set