commit fd3a78a538b2591a420f173faea442ae969ff623
author Shengzhou Liu <Shengzhou.Liu@freescale.com> Wed Apr 22 10:59:50 2015 +0800
committer York Sun <yorksun@freescale.com> Mon May 04 09:25:12 2015 -0700
tree c4552ab9843cfc935647a06264f8131dddb48350
parent 1a56fcea9f47ce9184f4dafd3e856de2d85d47cd

board/t2080rdb: reset cs4315 phy

CS4315 PHY doesn't support phy-reset by software, it
needs to reset it by hardware via CPLD control.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

board/freescale/t208xrdb/cpld.h

diff --git a/board/freescale/t208xrdb/cpld.h b/board/freescale/t208xrdb/cpld.h
index 3f15338..9bd5247 100644
--- a/board/freescale/t208xrdb/cpld.h
+++ b/board/freescale/t208xrdb/cpld.h
@@ -40,3 +40,6 @@
 #define CPLD_LBMAP_RESET	0xFF
 #define CPLD_LBMAP_SHIFT	0x03
 #define CPLD_BOOT_SEL		0x80
+
+/* RSTCON Register */
+#define CPLD_RSTCON_EDC_RST	0x04