Merge git://git.denx.de/u-boot-marvell
diff --git a/arch/arm/mach-mvebu/serdes/a38x/Makefile b/arch/arm/mach-mvebu/serdes/a38x/Makefile
index 1503da8..83b3c0f 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/Makefile
+++ b/arch/arm/mach-mvebu/serdes/a38x/Makefile
@@ -5,6 +5,5 @@
obj-$(CONFIG_SPL_BUILD) = ctrl_pex.o
obj-$(CONFIG_SPL_BUILD) += high_speed_env_spec.o
obj-$(CONFIG_SPL_BUILD) += high_speed_env_spec-38x.o
-obj-$(CONFIG_SPL_BUILD) += high_speed_topology_spec-38x.o
obj-$(CONFIG_SPL_BUILD) += seq_exec.o
obj-$(CONFIG_SPL_BUILD) += sys_env_lib.o
diff --git a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
index 5f223f9..06a7715 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
@@ -13,17 +13,16 @@
#include "ctrl_pex.h"
#include "sys_env_lib.h"
-int hws_pex_config(struct serdes_map *serdes_map)
+int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
{
u32 pex_idx, tmp, next_busno, first_busno, temp_pex_reg,
temp_reg, addr, dev_id, ctrl_mode;
enum serdes_type serdes_type;
- u32 idx, max_lane_num;
+ u32 idx;
DEBUG_INIT_FULL_S("\n### hws_pex_config ###\n");
- max_lane_num = hws_serdes_get_max_lane();
- for (idx = 0; idx < max_lane_num; idx++) {
+ for (idx = 0; idx < count; idx++) {
serdes_type = serdes_map[idx].serdes_type;
/* configuration for PEX only */
if ((serdes_type != PEX0) && (serdes_type != PEX1) &&
@@ -47,7 +46,7 @@
tmp = reg_read(SOC_CTRL_REG);
tmp &= ~0x03;
- for (idx = 0; idx < max_lane_num; idx++) {
+ for (idx = 0; idx < count; idx++) {
serdes_type = serdes_map[idx].serdes_type;
if ((serdes_type != PEX0) &&
((serdes_map[idx].serdes_mode == PEX_ROOT_COMPLEX_X4) ||
@@ -81,7 +80,7 @@
next_busno = 0;
mdelay(150);
- for (idx = 0; idx < max_lane_num; idx++) {
+ for (idx = 0; idx < count; idx++) {
serdes_type = serdes_map[idx].serdes_type;
DEBUG_INIT_FULL_S(" serdes_type=0x");
DEBUG_INIT_FULL_D(serdes_type, 8);
@@ -191,7 +190,7 @@
/* Update pex DEVICE ID */
ctrl_mode = sys_env_model_get();
- for (idx = 0; idx < max_lane_num; idx++) {
+ for (idx = 0; idx < count; idx++) {
serdes_type = serdes_map[idx].serdes_type;
/* configuration for PEX only */
if ((serdes_type != PEX0) && (serdes_type != PEX1) &&
diff --git a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h
index df395bf..5f7e2c7 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h
+++ b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h
@@ -78,7 +78,7 @@
#define PEX_STATUS_AND_COMMAND 0x004
#define PXSAC_MABORT BIT(29) /* Recieved Master Abort */
-int hws_pex_config(struct serdes_map *serdes_map);
+int hws_pex_config(const struct serdes_map *serdes_map, u8 count);
int pex_local_bus_num_set(u32 pex_if, u32 bus_num);
int pex_local_dev_num_set(u32 pex_if, u32 dev_num);
u32 pex_config_read(u32 pex_if, u32 bus, u32 dev, u32 func, u32 reg_off);
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c
index 5ff8567..104e7e8 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c
@@ -5,7 +5,6 @@
*/
#include <common.h>
-#include <i2c.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
index 23af769..7d67199 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
@@ -5,14 +5,12 @@
*/
#include <common.h>
-#include <i2c.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include "high_speed_env_spec.h"
-#include "high_speed_topology_spec.h"
#include "sys_env_lib.h"
#include "ctrl_pex.h"
@@ -22,11 +20,6 @@
#error "No device is defined"
#endif
-/*
- * The board topology map, initialized in the beginning of
- * ctrl_high_speed_serdes_phy_config
- */
-struct serdes_map serdes_configuration_map[MAX_SERDES_LANES];
/*
* serdes_seq_db - holds all serdes sequences, their size and the
@@ -1364,28 +1357,8 @@
return seq_id;
}
-/*
- * This is the weak default function for the Marvell evaluation or
- * development boarrds. Like the DB-88F6820-GP and others.
- * Custom boards should define this function in their board
- * code (board directory). And overwrite this default function
- * with this custom specific code.
- */
-__weak int hws_board_topology_load(struct serdes_map *serdes_map_array)
-{
- u32 board_id = mv_board_id_get();
- u32 board_id_index = mv_board_id_index_get(board_id);
-
- DEBUG_INIT_FULL_S("\n### hws_board_topology_load ###\n");
- /* getting board topology according to the board id */
- DEBUG_INIT_FULL_S("Getting board topology according to the board id\n");
-
- CHECK_STATUS(load_topology_func_arr[board_id_index] (serdes_map_array));
-
- return MV_OK;
-}
-
-void print_topology_details(struct serdes_map *serdes_map_array)
+static void print_topology_details(const struct serdes_map *serdes_map,
+ u8 count)
{
u32 lane_num;
@@ -1393,16 +1366,16 @@
DEBUG_INIT_S(" | Lane # | Speed | Type |\n");
DEBUG_INIT_S(" --------------------------------\n");
- for (lane_num = 0; lane_num < hws_serdes_get_max_lane(); lane_num++) {
- if (serdes_map_array[lane_num].serdes_type == DEFAULT_SERDES)
+ for (lane_num = 0; lane_num < count; lane_num++) {
+ if (serdes_map[lane_num].serdes_type == DEFAULT_SERDES)
continue;
DEBUG_INIT_S(" | ");
DEBUG_INIT_D(hws_get_physical_serdes_num(lane_num), 1);
DEBUG_INIT_S(" | ");
- DEBUG_INIT_D(serdes_map_array[lane_num].serdes_speed, 2);
+ DEBUG_INIT_D(serdes_map[lane_num].serdes_speed, 2);
DEBUG_INIT_S(" | ");
DEBUG_INIT_S((char *)
- serdes_type_to_string[serdes_map_array[lane_num].
+ serdes_type_to_string[serdes_map[lane_num].
serdes_type]);
DEBUG_INIT_S("\t|\n");
}
@@ -1436,6 +1409,9 @@
int serdes_phy_config(void)
{
+ struct serdes_map *serdes_map;
+ u8 serdes_count;
+
DEBUG_INIT_FULL_S("\n### ctrl_high_speed_serdes_phy_config ###\n");
DEBUG_INIT_S("High speed PHY - Version: ");
@@ -1448,23 +1424,24 @@
return MV_FAIL;
}
- /* I2C init */
- i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-
/* Board topology load */
DEBUG_INIT_FULL_S
("ctrl_high_speed_serdes_phy_config: Loading board topology..\n");
- CHECK_STATUS(hws_board_topology_load(serdes_configuration_map));
+ CHECK_STATUS(hws_board_topology_load(&serdes_map, &serdes_count));
+ if (serdes_count > hws_serdes_get_max_lane()) {
+ printf("Error: too many serdes lanes specified by board\n");
+ return MV_FAIL;
+ }
/* print topology */
- print_topology_details(serdes_configuration_map);
+ print_topology_details(serdes_map, serdes_count);
CHECK_STATUS(hws_pre_serdes_init_config());
/* Power-Up sequence */
DEBUG_INIT_FULL_S
("ctrl_high_speed_serdes_phy_config: Starting serdes power up sequence\n");
- CHECK_STATUS(hws_power_up_serdes_lanes(serdes_configuration_map));
+ CHECK_STATUS(hws_power_up_serdes_lanes(serdes_map, serdes_count));
DEBUG_INIT_FULL_S
("\n### ctrl_high_speed_serdes_phy_config ended successfully ###\n");
@@ -1488,7 +1465,7 @@
return MV_OK;
}
-int hws_power_up_serdes_lanes(struct serdes_map *serdes_config_map)
+int hws_power_up_serdes_lanes(struct serdes_map *serdes_map, u8 count)
{
u32 serdes_id, serdes_lane_num;
enum ref_clock ref_clock;
@@ -1510,22 +1487,21 @@
/* COMMON PHYS SELECTORS register configuration */
DEBUG_INIT_FULL_S
("hws_power_up_serdes_lanes: Updating COMMON PHYS SELECTORS reg\n");
- CHECK_STATUS(hws_update_serdes_phy_selectors(serdes_configuration_map));
+ CHECK_STATUS(hws_update_serdes_phy_selectors(serdes_map, count));
/* per Serdes Power Up */
- for (serdes_id = 0; serdes_id < hws_serdes_get_max_lane();
- serdes_id++) {
+ for (serdes_id = 0; serdes_id < count; serdes_id++) {
DEBUG_INIT_FULL_S
("calling serdes_power_up_ctrl: serdes lane number ");
DEBUG_INIT_FULL_D_10(serdes_lane_num, 1);
DEBUG_INIT_FULL_S("\n");
serdes_lane_num = hws_get_physical_serdes_num(serdes_id);
- serdes_type = serdes_config_map[serdes_id].serdes_type;
- serdes_speed = serdes_config_map[serdes_id].serdes_speed;
- serdes_mode = serdes_config_map[serdes_id].serdes_mode;
- serdes_rx_polarity_swap = serdes_config_map[serdes_id].swap_rx;
- serdes_tx_polarity_swap = serdes_config_map[serdes_id].swap_tx;
+ serdes_type = serdes_map[serdes_id].serdes_type;
+ serdes_speed = serdes_map[serdes_id].serdes_speed;
+ serdes_mode = serdes_map[serdes_id].serdes_mode;
+ serdes_rx_polarity_swap = serdes_map[serdes_id].swap_rx;
+ serdes_tx_polarity_swap = serdes_map[serdes_id].swap_tx;
/* serdes lane is not in use */
if (serdes_type == DEFAULT_SERDES)
@@ -1560,10 +1536,10 @@
/* Set PEX_TX_CONFIG_SEQ sequence for PEXx4 mode.
After finish the Power_up sequence for all lanes,
the lanes should be released from reset state. */
- CHECK_STATUS(hws_pex_tx_config_seq(serdes_config_map));
+ CHECK_STATUS(hws_pex_tx_config_seq(serdes_map, count));
/* PEX configuration */
- CHECK_STATUS(hws_pex_config(serdes_config_map));
+ CHECK_STATUS(hws_pex_config(serdes_map, count));
}
/* USB2 configuration */
@@ -1931,7 +1907,7 @@
return MV_OK;
}
-int hws_update_serdes_phy_selectors(struct serdes_map *serdes_config_map)
+int hws_update_serdes_phy_selectors(struct serdes_map *serdes_map, u8 count)
{
u32 lane_data, idx, serdes_lane_hw_num, reg_data = 0;
enum serdes_type serdes_type;
@@ -1953,10 +1929,9 @@
* Updating bits 0-17 in the COMMON PHYS SELECTORS register
* according to the serdes types
*/
- for (idx = 0; idx < hws_serdes_get_max_lane();
- idx++) {
- serdes_type = serdes_config_map[idx].serdes_type;
- serdes_mode = serdes_config_map[idx].serdes_mode;
+ for (idx = 0; idx < count; idx++) {
+ serdes_type = serdes_map[idx].serdes_type;
+ serdes_mode = serdes_map[idx].serdes_mode;
serdes_lane_hw_num = hws_get_physical_serdes_num(idx);
lane_data =
@@ -1968,7 +1943,7 @@
if (hws_serdes_topology_verify
(serdes_type, idx, serdes_mode) != MV_OK) {
- serdes_config_map[idx].serdes_type =
+ serdes_map[idx].serdes_type =
DEFAULT_SERDES;
printf("%s: SerDes lane #%d is disabled\n", __func__,
serdes_lane_hw_num);
@@ -1994,8 +1969,7 @@
printf
("%s: Warning: SerDes lane #%d and type %d are not supported together\n",
__func__, serdes_lane_hw_num, serdes_mode);
- serdes_config_map[idx].serdes_type =
- DEFAULT_SERDES;
+ serdes_map[idx].serdes_type = DEFAULT_SERDES;
printf("%s: SerDes lane #%d is disabled\n", __func__,
serdes_lane_hw_num);
continue;
@@ -2017,7 +1991,7 @@
/* Print topology */
if (updated_topology_print)
- print_topology_details(serdes_config_map);
+ print_topology_details(serdes_map, count);
/*
* Updating the PEXx4 Enable bit in the COMMON PHYS SELECTORS
@@ -2171,7 +2145,7 @@
* RETURNS: MV_OK - for success
* MV_BAD_PARAM - for fail
*/
-int hws_pex_tx_config_seq(struct serdes_map *serdes_map)
+int hws_pex_tx_config_seq(const struct serdes_map *serdes_map, u8 count)
{
enum serdes_mode serdes_mode;
u32 serdes_lane_id, serdes_lane_hw_num;
@@ -2185,8 +2159,7 @@
*/
/* relese pipe soft reset for all lanes */
- for (serdes_lane_id = 0; serdes_lane_id < hws_serdes_get_max_lane();
- serdes_lane_id++) {
+ for (serdes_lane_id = 0; serdes_lane_id < count; serdes_lane_id++) {
serdes_mode = serdes_map[serdes_lane_id].serdes_mode;
serdes_lane_hw_num =
hws_get_physical_serdes_num(serdes_lane_id);
@@ -2199,8 +2172,7 @@
}
/* set phy soft reset for all lanes */
- for (serdes_lane_id = 0; serdes_lane_id < hws_serdes_get_max_lane();
- serdes_lane_id++) {
+ for (serdes_lane_id = 0; serdes_lane_id < count; serdes_lane_id++) {
serdes_mode = serdes_map[serdes_lane_id].serdes_mode;
serdes_lane_hw_num =
hws_get_physical_serdes_num(serdes_lane_id);
@@ -2212,8 +2184,7 @@
}
/* set phy soft reset for all lanes */
- for (serdes_lane_id = 0; serdes_lane_id < hws_serdes_get_max_lane();
- serdes_lane_id++) {
+ for (serdes_lane_id = 0; serdes_lane_id < count; serdes_lane_id++) {
serdes_mode = serdes_map[serdes_lane_id].serdes_mode;
serdes_lane_hw_num =
hws_get_physical_serdes_num(serdes_lane_id);
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h
index 2508721..3513770 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h
@@ -215,12 +215,12 @@
u8 hws_ctrl_serdes_rev_get(void);
int mv_update_serdes_select_phy_mode_seq(void);
-int hws_board_topology_load(struct serdes_map *serdes_map_array);
+int hws_board_topology_load(struct serdes_map **serdes_map, u8 *count);
enum serdes_seq serdes_type_and_speed_to_speed_seq(enum serdes_type serdes_type,
enum serdes_speed baud_rate);
int hws_serdes_seq_init(void);
int hws_serdes_seq_db_init(void);
-int hws_power_up_serdes_lanes(struct serdes_map *serdes_config_map);
+int hws_power_up_serdes_lanes(struct serdes_map *serdes_map, u8 count);
int hws_ctrl_high_speed_serdes_phy_config(void);
int serdes_power_up_ctrl(u32 serdes_num, int serdes_power_up,
enum serdes_type serdes_type,
@@ -237,14 +237,14 @@
enum ref_clock *ref_clock);
int hws_ref_clock_set(u32 serdes_num, enum serdes_type serdes_type,
enum ref_clock ref_clock);
-int hws_update_serdes_phy_selectors(struct serdes_map *serdes_config_map);
+int hws_update_serdes_phy_selectors(struct serdes_map *serdes_map, u8 count);
u32 hws_serdes_get_phy_selector_val(int serdes_num,
enum serdes_type serdes_type);
u32 hws_serdes_get_ref_clock_val(enum serdes_type serdes_type);
u32 hws_serdes_get_max_lane(void);
int hws_get_ext_base_addr(u32 serdes_num, u32 base_addr, u32 unit_base_offset,
u32 *unit_base_reg, u32 *unit_offset);
-int hws_pex_tx_config_seq(struct serdes_map *serdes_map);
+int hws_pex_tx_config_seq(const struct serdes_map *serdes_map, u8 count);
u32 hws_get_physical_serdes_num(u32 serdes_num);
int hws_is_serdes_active(u8 lane_num);
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_topology_spec-38x.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_topology_spec-38x.c
deleted file mode 100644
index 5f2c3eb..0000000
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_topology_spec-38x.c
+++ /dev/null
@@ -1,1009 +0,0 @@
-/*
- * Copyright (C) Marvell International Ltd. and its affiliates
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-#include <common.h>
-#include <i2c.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/soc.h>
-
-#include "high_speed_topology_spec.h"
-#include "sys_env_lib.h"
-
-#ifdef CONFIG_CUSTOMER_BOARD_SUPPORT
-/*
- * This is an example implementation for this custom board
- * specific function
- */
-static struct serdes_map custom_board_topology_config[] = {
- /* Customer Board Topology - reference from Marvell DB-GP board */
- {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {SATA3, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {SATA2, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}
-};
-
-int hws_board_topology_load(struct serdes_map *serdes_map_array)
-{
- serdes_map_array = custom_board_topology_config;
-}
-#endif
-
-load_topology_func_ptr load_topology_func_arr[] = {
- load_topology_rd, /* RD NAS */
- load_topology_db, /* 6820 DB-BP (A38x) */
- load_topology_rd, /* RD AP */
- load_topology_db_ap, /* DB AP */
- load_topology_db_gp, /* DB GP */
- load_topology_db_381, /* 6821 DB-BP (A381) */
- load_topology_db_amc, /* DB-AMC */
-};
-
-/*****************************************/
-/** Load topology - Marvell 380 DB - BP **/
-/*****************************************/
-/* Configuration options */
-struct serdes_map db_config_default[MAX_SERDES_LANES] = {
- {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- {SATA3, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}
-};
-
-struct serdes_map db_config_slm1363_c[MAX_SERDES_LANES] = {
- {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0, 0},
- {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- {PEX3, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- {SATA2, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0, 0},
-};
-
-struct serdes_map db_config_slm1363_d[MAX_SERDES_LANES] = {
- {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X4, 0, 0},
- {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X4, 0, 0},
- {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X4, 0, 0},
- {PEX3, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X4, 0, 0},
- {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}
-};
-
-struct serdes_map db_config_slm1363_e[MAX_SERDES_LANES] = {
- {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0, 0},
- {SATA2, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}
-};
-
-struct serdes_map db_config_slm1363_f[MAX_SERDES_LANES] = {
- {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0, 0},
- {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- {PEX3, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- {SATA2, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}
-};
-
-struct serdes_map db_config_slm1364_d[MAX_SERDES_LANES] = {
- {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0, 0},
- {SGMII0, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0, 0},
- {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0, 0},
- {SGMII1, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {SGMII2, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0, 0}
-};
-
-struct serdes_map db_config_slm1364_e[MAX_SERDES_LANES] = {
- {SGMII0, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {SGMII1, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0, 0},
- {SGMII2, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0, 0},
- {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}
-};
-
-struct serdes_map db_config_slm1364_f[MAX_SERDES_LANES] = {
- {SGMII0, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0, 0},
- {SGMII1, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {SGMII2, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0, 0},
- {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}
-};
-
-/*************************************************************************/
-/** The following structs are mapping for DB board 'SatR' configuration **/
-/*************************************************************************/
-struct serdes_map db_satr_config_lane1[SATR_DB_LANE1_MAX_OPTIONS] = {
- /* 0 */ {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0,
- 0},
- /* 1 */ {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- /* 2 */ {SATA0, SERDES_SPEED_3_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- /* 3 */ {SGMII0, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0,
- 0},
- /* 4 */ {SGMII1, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0,
- 0},
- /* 5 */ {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0,
- 0},
- /* 6 */ {QSGMII, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}
-};
-
-struct serdes_map db_satr_config_lane2[SATR_DB_LANE2_MAX_OPTIONS] = {
- /* 0 */ {DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE, 0,
- 0},
- /* 1 */ {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- /* 2 */ {SATA1, SERDES_SPEED_3_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- /* 3 */ {SGMII1, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0,
- 0}
-};
-
-/*******************************************************/
-/* Configuration options DB ****************************/
-/* mapping from TWSI address data to configuration map */
-/*******************************************************/
-struct serdes_map *topology_config_db[] = {
- db_config_slm1363_c,
- db_config_slm1363_d,
- db_config_slm1363_e,
- db_config_slm1363_f,
- db_config_slm1364_d,
- db_config_slm1364_e,
- db_config_slm1364_f,
- db_config_default
-};
-
-/*************************************/
-/** Load topology - Marvell DB - AP **/
-/*************************************/
-struct serdes_map db_ap_config_default[MAX_SERDES_LANES] = {
- /* 0 */ {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- /* 1 */ {SGMII1, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0,
- 0},
- /* 2 */ {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- /* 3 */ {SGMII2, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0,
- 0},
- /* 4 */ {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0,
- 0},
- /* 5 */ {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}
-};
-
-/*************************************/
-/** Load topology - Marvell DB - GP **/
-/*************************************/
-struct serdes_map db_gp_config_default[MAX_SERDES_LANES] = {
- /* 0 */ {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- /* 1 */ {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- /* 2 */ {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- /* 3 */ {SATA3, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- /* 4 */ {SATA2, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
- /* 5 */ {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0,
- 0}
-};
-
-struct serdes_map db_amc_config_default[MAX_SERDES_LANES] = {
- /* 0 */ {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X4, 0, 0},
- /* 1 */ {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X4, 0, 0},
- /* 2 */ {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X4, 0, 0},
- /* 3 */ {PEX3, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X4, 0, 0},
- /* 4 */ {SGMII1, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0,
- 0},
- /* 5 */ {SGMII2, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 0,
- 0},
-};
-
-/*****************************************/
-/** Load topology - Marvell 381 DB - BP **/
-/*****************************************/
-/* Configuration options */
-struct serdes_map db381_config_default[MAX_SERDES_LANES] = {
- {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 1, 1},
- {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
- {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}
-};
-
-struct serdes_map db_config_slm1427[MAX_SERDES_LANES] = {
- {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 1, 1},
- {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 1, 1},
- {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 1, 1},
- {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 1, 1}
-};
-
-struct serdes_map db_config_slm1426[MAX_SERDES_LANES] = {
- {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 1, 1},
- {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 1, 1},
- {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 1, 1},
- {SGMII2, SERDES_SPEED_3_125_GBPS, SERDES_DEFAULT_MODE, 1, 1}
-};
-
-/*
- * this array must be aligned with enum topology_config_db381 enum,
- * every update to this array requires update to enum topology_config_db381
- * enum
- */
-struct serdes_map *topology_config_db_381[] = {
- db_config_slm1427,
- db_config_slm1426,
- db381_config_default,
-};
-
-u8 topology_config_db_mode_get(void)
-{
- u8 mode;
-
- DEBUG_INIT_FULL_S("\n### topology_config_db_mode_get ###\n");
-
- /* Default - return DB_CONFIG_DEFAULT */
-
- if (!i2c_read(DB_GET_MODE_SLM1363_ADDR, 0, 1, &mode, 1)) {
- switch (mode & 0xf) {
- case 0xc:
- DEBUG_INIT_S("\nInit DB board SLM 1363 C topology\n");
- return DB_CONFIG_SLM1363_C;
- case 0xd:
- DEBUG_INIT_S("\nInit DB board SLM 1363 D topology\n");
- return DB_CONFIG_SLM1363_D;
- case 0xe:
- DEBUG_INIT_S("\nInit DB board SLM 1363 E topology\n");
- return DB_CONFIG_SLM1363_E;
- case 0xf:
- DEBUG_INIT_S("\nInit DB board SLM 1363 F topology\n");
- return DB_CONFIG_SLM1363_F;
- default: /* not the right module */
- break;
- }
- }
-
- /* SLM1364 Module */
- if (i2c_read(DB_GET_MODE_SLM1364_ADDR, 0, 1, &mode, 1)) {
- DEBUG_INIT_S("\nInit DB board default topology\n");
- return DB_CONFIG_DEFAULT;
- }
-
- switch (mode & 0xf) {
- case 0xd:
- DEBUG_INIT_S("\nInit DB board SLM 1364 D topology\n");
- return DB_CONFIG_SLM1364_D;
- case 0xe:
- DEBUG_INIT_S("\nInit DB board SLM 1364 E topology\n");
- return DB_CONFIG_SLM1364_E;
- case 0xf:
- DEBUG_INIT_S("\nInit DB board SLM 1364 F topology\n");
- return DB_CONFIG_SLM1364_F;
- default: /* Default configuration */
- DEBUG_INIT_S("\nInit DB board default topology\n");
- return DB_CONFIG_DEFAULT;
- }
-}
-
-u8 topology_config_db_381_mode_get(void)
-{
- u8 mode;
-
- DEBUG_INIT_FULL_S("\n### topology_config_db_381_mode_get ###\n");
-
- if (!i2c_read(DB381_GET_MODE_SLM1426_1427_ADDR, 0, 2, &mode, 1)) {
- switch (mode & 0xf) {
- case 0x1:
- DEBUG_INIT_S("\nInit DB-381 board SLM 1427 topology\n");
- return DB_CONFIG_SLM1427;
- case 0x2:
- DEBUG_INIT_S("\nInit DB-381 board SLM 1426 topology\n");
- return DB_CONFIG_SLM1426;
- default: /* not the right module */
- break;
- }
- }
-
- /* in case not detected any supported module, use default topology */
- DEBUG_INIT_S("\nInit DB-381 board default topology\n");
- return DB_381_CONFIG_DEFAULT;
-}
-
-/*
- * Read SatR field 'sgmiispeed' and update lane topology SGMII entries
- * speed setup
- */
-int update_topology_sgmii_speed(struct serdes_map *serdes_map_array)
-{
- u32 serdes_type, lane_num;
- u8 config_val;
-
- /* Update SGMII speed settings by 'sgmiispeed' SatR value */
- for (lane_num = 0; lane_num < hws_serdes_get_max_lane(); lane_num++) {
- serdes_type = serdes_map_array[lane_num].serdes_type;
- /*Read SatR configuration for SGMII speed */
- if ((serdes_type == SGMII0) || (serdes_type == SGMII1) ||
- (serdes_type == SGMII2)) {
- /* Read SatR 'sgmiispeed' value */
- if (i2c_read(EEPROM_I2C_ADDR, 0, 2, &config_val, 1)) {
- printf("%s: TWSI Read of 'sgmiispeed' failed\n",
- __func__);
- return MV_FAIL;
- }
-
- if (0 == (config_val & 0x40)) {
- serdes_map_array[lane_num].serdes_speed =
- SERDES_SPEED_1_25_GBPS;
- } else {
- serdes_map_array[lane_num].serdes_speed =
- SERDES_SPEED_3_125_GBPS;
- }
- }
- }
- return MV_OK;
-}
-
-struct serdes_map default_lane = {
- DEFAULT_SERDES, LAST_SERDES_SPEED, SERDES_DEFAULT_MODE
-};
-int is_custom_topology = 0; /* indicate user of non-default topology */
-
-/*
- * Read SatR fields (dbserdes1/2 , gpserdes1/2/5) and update lane
- * topology accordingly
- */
-int update_topology_satr(struct serdes_map *serdes_map_array)
-{
- u8 config_val, lane_select, i;
- u32 board_id = mv_board_id_get();
-
- switch (board_id) {
- case DB_68XX_ID: /* read 'dbserdes1' & 'dbserdes2' */
- case DB_BP_6821_ID:
- if (i2c_read(EEPROM_I2C_ADDR, 1, 2, &config_val, 1)) {
- printf("%s: TWSI Read of 'dbserdes1/2' failed\n",
- __func__);
- return MV_FAIL;
- }
-
- /* Lane #1 */
- lane_select = (config_val & SATR_DB_LANE1_CFG_MASK) >>
- SATR_DB_LANE1_CFG_OFFSET;
- if (lane_select >= SATR_DB_LANE1_MAX_OPTIONS) {
- printf("\n\%s: Error: invalid value for SatR field 'dbserdes1' (%x)\n",
- __func__, lane_select);
- printf("\t_skipping Topology update (run 'SatR write default')\n");
- return MV_FAIL;
- }
-
- /*
- * If modified default serdes_type for lane#1, update
- * topology and mark it as custom
- */
- if (serdes_map_array[1].serdes_type !=
- db_satr_config_lane1[lane_select].serdes_type) {
- serdes_map_array[1] = db_satr_config_lane1[lane_select];
- is_custom_topology = 1;
- /* DB 381/2 board has inverted SerDes polarity */
- if (board_id == DB_BP_6821_ID)
- serdes_map_array[1].swap_rx =
- serdes_map_array[1].swap_tx = 1;
- }
-
- /* Lane #2 */
- lane_select = (config_val & SATR_DB_LANE2_CFG_MASK) >>
- SATR_DB_LANE2_CFG_OFFSET;
- if (lane_select >= SATR_DB_LANE2_MAX_OPTIONS) {
- printf("\n\%s: Error: invalid value for SatR field 'dbserdes2' (%x)\n",
- __func__, lane_select);
- printf("\t_skipping Topology update (run 'SatR write default')\n");
- return MV_FAIL;
- }
-
- /*
- * If modified default serdes_type for lane@2, update
- * topology and mark it as custom
- */
- if (serdes_map_array[2].serdes_type !=
- db_satr_config_lane2[lane_select].serdes_type) {
- serdes_map_array[2] = db_satr_config_lane2[lane_select];
- is_custom_topology = 1;
- /* DB 381/2 board has inverted SerDes polarity */
- if (board_id == DB_BP_6821_ID)
- serdes_map_array[2].swap_rx =
- serdes_map_array[2].swap_tx = 1;
- }
-
- if (is_custom_topology == 1) {
- /*
- * Check for conflicts with detected lane #1 and
- * lane #2 (Disable conflicted lanes)
- */
- for (i = 0; i < hws_serdes_get_max_lane(); i++) {
- if (i != 1 && serdes_map_array[1].serdes_type ==
- serdes_map_array[i].serdes_type) {
- printf("\t_lane #%d Type conflicts with Lane #1 (Lane #%d disabled)\n",
- i, i);
- serdes_map_array[i] =
- db_satr_config_lane1[0];
- }
-
- if (i != 2 &&
- serdes_map_array[2].serdes_type ==
- serdes_map_array[i].serdes_type) {
- printf("\t_lane #%d Type conflicts with Lane #2 (Lane #%d disabled)\n",
- i, i);
- serdes_map_array[i] =
- db_satr_config_lane1[0];
- }
- }
- }
-
- break; /* case DB_68XX_ID */
- case DB_GP_68XX_ID: /* read 'gpserdes1' & 'gpserdes2' */
- if (i2c_read(EEPROM_I2C_ADDR, 2, 2, &config_val, 1)) {
- printf("%s: TWSI Read of 'gpserdes1/2' failed\n",
- __func__);
- return MV_FAIL;
- }
-
- /*
- * Lane #1:
- * lane_select = 0 --> SATA0,
- * lane_select = 1 --> PCIe0 (mini PCIe)
- */
- lane_select = (config_val & SATR_GP_LANE1_CFG_MASK) >>
- SATR_GP_LANE1_CFG_OFFSET;
- if (lane_select == 1) {
- serdes_map_array[1].serdes_mode = PEX0;
- serdes_map_array[1].serdes_speed = SERDES_SPEED_5_GBPS;
- serdes_map_array[1].serdes_type = PEX_ROOT_COMPLEX_X1;
- /*
- * If lane 1 is set to PCIe0 --> disable PCIe0
- * on lane 0
- */
- serdes_map_array[0] = default_lane;
- /* indicate user of non-default topology */
- is_custom_topology = 1;
- }
- printf("Lane 1 detection: %s\n",
- lane_select ? "PCIe0 (mini PCIe)" : "SATA0");
-
- /*
- * Lane #2:
- * lane_select = 0 --> SATA1,
- * lane_select = 1 --> PCIe1 (mini PCIe)
- */
- lane_select = (config_val & SATR_GP_LANE2_CFG_MASK) >>
- SATR_GP_LANE2_CFG_OFFSET;
- if (lane_select == 1) {
- serdes_map_array[2].serdes_type = PEX1;
- serdes_map_array[2].serdes_speed = SERDES_SPEED_5_GBPS;
- serdes_map_array[2].serdes_mode = PEX_ROOT_COMPLEX_X1;
- /* indicate user of non-default topology */
- is_custom_topology = 1;
- }
- printf("Lane 2 detection: %s\n",
- lane_select ? "PCIe1 (mini PCIe)" : "SATA1");
- break; /* case DB_GP_68XX_ID */
- }
-
- if (is_custom_topology)
- printf("\nDetected custom SerDes topology (to restore default run 'SatR write default')\n\n");
-
- return MV_OK;
-}
-
-/*
- * hws_update_device_toplogy
- * DESCRIPTION: Update the default board topology for specific device Id
- * INPUT:
- * topology_config_ptr - pointer to the Serdes mapping
- * topology_mode - topology mode (index)
- * OUTPUT: None
- * RRETURNS:
- * MV_OK - if updating the board topology success
- * MV_BAD_PARAM - if the input parameter is wrong
- */
-int hws_update_device_toplogy(struct serdes_map *topology_config_ptr,
- enum topology_config_db topology_mode)
-{
- u32 dev_id = sys_env_device_id_get();
- u32 board_id = mv_board_id_get();
-
- switch (topology_mode) {
- case DB_CONFIG_DEFAULT:
- switch (dev_id) {
- case MV_6810:
- /*
- * DB-AP : default for Lane3=SGMII2 -->
- * 6810 supports only 2 SGMII interfaces:
- * lane 3 disabled
- */
- if (board_id == DB_AP_68XX_ID) {
- printf("Device 6810 supports only 2 SGMII interfaces: SGMII-2 @ lane3 disabled\n");
- topology_config_ptr[3] = default_lane;
- }
-
- /*
- * 6810 has only 4 SerDes and the forth one is
- * Serdes number 5 (i.e. Serdes 4 is not connected),
- * therefore we need to copy SerDes 5 configuration
- * to SerDes 4
- */
- printf("Device 6810 does not supports SerDes Lane #4: replaced topology entry with lane #5\n");
- topology_config_ptr[4] = topology_config_ptr[5];
-
- /*
- * No break between cases since the 1st
- * 6820 limitation apply on 6810
- */
- case MV_6820:
- /*
- * DB-GP & DB-BP: default for Lane3=SATA3 -->
- * 6810/20 supports only 2 SATA interfaces:
- * lane 3 disabled
- */
- if ((board_id == DB_68XX_ID) ||
- (board_id == DB_GP_68XX_ID)) {
- printf("Device 6810/20 supports only 2 SATA interfaces: SATA Port 3 @ lane3 disabled\n");
- topology_config_ptr[3] = default_lane;
- }
- /*
- * DB-GP on 6820 only: default for Lane4=SATA2
- * --> 6820 supports only 2 SATA interfaces:
- * lane 3 disabled
- */
- if (board_id == DB_GP_68XX_ID && dev_id == MV_6820) {
- printf("Device 6820 supports only 2 SATA interfaces: SATA Port 2 @ lane4 disabled\n");
- topology_config_ptr[4] = default_lane;
- }
- break;
- default:
- break;
- }
- break;
-
- default:
- printf("sys_env_update_device_toplogy: selected topology is not supported by this routine\n");
- break;
- }
-
- return MV_OK;
-}
-
-int load_topology_db_381(struct serdes_map *serdes_map_array)
-{
- u32 lane_num;
- u8 topology_mode;
- struct serdes_map *topology_config_ptr;
- u8 twsi_data;
- u8 usb3_host0_or_device = 0, usb3_host1_or_device = 0;
-
- printf("\nInitialize DB-88F6821-BP board topology\n");
-
- /* Getting the relevant topology mode (index) */
- topology_mode = topology_config_db_381_mode_get();
- topology_config_ptr = topology_config_db_381[topology_mode];
-
- /* Read USB3.0 mode: HOST/DEVICE */
- if (load_topology_usb_mode_get(&twsi_data) == MV_OK) {
- usb3_host0_or_device = (twsi_data & 0x1);
- /* Only one USB3 device is enabled */
- if (usb3_host0_or_device == 0)
- usb3_host1_or_device = ((twsi_data >> 1) & 0x1);
- }
-
- /* Updating the topology map */
- for (lane_num = 0; lane_num < hws_serdes_get_max_lane(); lane_num++) {
- serdes_map_array[lane_num].serdes_mode =
- topology_config_ptr[lane_num].serdes_mode;
- serdes_map_array[lane_num].serdes_speed =
- topology_config_ptr[lane_num].serdes_speed;
- serdes_map_array[lane_num].serdes_type =
- topology_config_ptr[lane_num].serdes_type;
- serdes_map_array[lane_num].swap_rx =
- topology_config_ptr[lane_num].swap_rx;
- serdes_map_array[lane_num].swap_tx =
- topology_config_ptr[lane_num].swap_tx;
-
- /* Update USB3 device if needed */
- if (usb3_host0_or_device == 1 &&
- serdes_map_array[lane_num].serdes_type == USB3_HOST0)
- serdes_map_array[lane_num].serdes_type = USB3_DEVICE;
-
- if (usb3_host1_or_device == 1 &&
- serdes_map_array[lane_num].serdes_type == USB3_HOST1)
- serdes_map_array[lane_num].serdes_type = USB3_DEVICE;
- }
-
- /* If not detected any SerDes Site module, read 'SatR' lane setup */
- if (topology_mode == DB_381_CONFIG_DEFAULT)
- update_topology_satr(serdes_map_array);
-
- /* update 'sgmiispeed' settings */
- update_topology_sgmii_speed(serdes_map_array);
-
- return MV_OK;
-}
-
-int load_topology_db(struct serdes_map *serdes_map_array)
-{
- u32 lane_num;
- u8 topology_mode;
- struct serdes_map *topology_config_ptr;
- u8 twsi_data;
- u8 usb3_host0_or_device = 0, usb3_host1_or_device = 0;
-
- printf("\nInitialize DB-88F6820-BP board topology\n");
-
- /* Getting the relevant topology mode (index) */
- topology_mode = topology_config_db_mode_get();
-
- if (topology_mode == DB_NO_TOPOLOGY)
- topology_mode = DB_CONFIG_DEFAULT;
-
- topology_config_ptr = topology_config_db[topology_mode];
-
- /* Update the default board topology device flavours */
- CHECK_STATUS(hws_update_device_toplogy
- (topology_config_ptr, topology_mode));
-
- /* Read USB3.0 mode: HOST/DEVICE */
- if (load_topology_usb_mode_get(&twsi_data) == MV_OK) {
- usb3_host0_or_device = (twsi_data & 0x1);
- /* Only one USB3 device is enabled */
- if (usb3_host0_or_device == 0)
- usb3_host1_or_device = ((twsi_data >> 1) & 0x1);
- }
-
- /* Updating the topology map */
- for (lane_num = 0; lane_num < hws_serdes_get_max_lane(); lane_num++) {
- serdes_map_array[lane_num].serdes_mode =
- topology_config_ptr[lane_num].serdes_mode;
- serdes_map_array[lane_num].serdes_speed =
- topology_config_ptr[lane_num].serdes_speed;
- serdes_map_array[lane_num].serdes_type =
- topology_config_ptr[lane_num].serdes_type;
- serdes_map_array[lane_num].swap_rx =
- topology_config_ptr[lane_num].swap_rx;
- serdes_map_array[lane_num].swap_tx =
- topology_config_ptr[lane_num].swap_tx;
-
- /*
- * Update USB3 device if needed - relevant for
- * lane 3,4,5 only
- */
- if (lane_num >= 3) {
- if ((serdes_map_array[lane_num].serdes_type ==
- USB3_HOST0) && (usb3_host0_or_device == 1))
- serdes_map_array[lane_num].serdes_type =
- USB3_DEVICE;
-
- if ((serdes_map_array[lane_num].serdes_type ==
- USB3_HOST1) && (usb3_host1_or_device == 1))
- serdes_map_array[lane_num].serdes_type =
- USB3_DEVICE;
- }
- }
-
- /* If not detected any SerDes Site module, read 'SatR' lane setup */
- if (topology_mode == DB_CONFIG_DEFAULT)
- update_topology_satr(serdes_map_array);
-
- /* update 'sgmiispeed' settings */
- update_topology_sgmii_speed(serdes_map_array);
-
- return MV_OK;
-}
-
-int load_topology_db_ap(struct serdes_map *serdes_map_array)
-{
- u32 lane_num;
- struct serdes_map *topology_config_ptr;
-
- DEBUG_INIT_FULL_S("\n### load_topology_db_ap ###\n");
-
- printf("\nInitialize DB-AP board topology\n");
- topology_config_ptr = db_ap_config_default;
-
- /* Update the default board topology device flavours */
- CHECK_STATUS(hws_update_device_toplogy
- (topology_config_ptr, DB_CONFIG_DEFAULT));
-
- /* Updating the topology map */
- for (lane_num = 0; lane_num < hws_serdes_get_max_lane(); lane_num++) {
- serdes_map_array[lane_num].serdes_mode =
- topology_config_ptr[lane_num].serdes_mode;
- serdes_map_array[lane_num].serdes_speed =
- topology_config_ptr[lane_num].serdes_speed;
- serdes_map_array[lane_num].serdes_type =
- topology_config_ptr[lane_num].serdes_type;
- serdes_map_array[lane_num].swap_rx =
- topology_config_ptr[lane_num].swap_rx;
- serdes_map_array[lane_num].swap_tx =
- topology_config_ptr[lane_num].swap_tx;
- }
-
- update_topology_sgmii_speed(serdes_map_array);
-
- return MV_OK;
-}
-
-int load_topology_db_gp(struct serdes_map *serdes_map_array)
-{
- u32 lane_num;
- struct serdes_map *topology_config_ptr;
- int is_sgmii = 0;
-
- DEBUG_INIT_FULL_S("\n### load_topology_db_gp ###\n");
-
- topology_config_ptr = db_gp_config_default;
-
- printf("\nInitialize DB-GP board topology\n");
-
- /* check S@R: if lane 5 is USB3 or SGMII */
- if (load_topology_rd_sgmii_usb(&is_sgmii) != MV_OK)
- printf("%s: TWSI Read failed - Loading Default Topology\n",
- __func__);
- else {
- topology_config_ptr[5].serdes_type =
- is_sgmii ? SGMII2 : USB3_HOST1;
- topology_config_ptr[5].serdes_speed = is_sgmii ?
- SERDES_SPEED_3_125_GBPS : SERDES_SPEED_5_GBPS;
- topology_config_ptr[5].serdes_mode = SERDES_DEFAULT_MODE;
- }
-
- /* Update the default board topology device flavours */
- CHECK_STATUS(hws_update_device_toplogy
- (topology_config_ptr, DB_CONFIG_DEFAULT));
-
- /* Updating the topology map */
- for (lane_num = 0; lane_num < hws_serdes_get_max_lane(); lane_num++) {
- serdes_map_array[lane_num].serdes_mode =
- topology_config_ptr[lane_num].serdes_mode;
- serdes_map_array[lane_num].serdes_speed =
- topology_config_ptr[lane_num].serdes_speed;
- serdes_map_array[lane_num].serdes_type =
- topology_config_ptr[lane_num].serdes_type;
- serdes_map_array[lane_num].swap_rx =
- topology_config_ptr[lane_num].swap_rx;
- serdes_map_array[lane_num].swap_tx =
- topology_config_ptr[lane_num].swap_tx;
- }
-
- /*
- * Update 'gpserdes1/2/3' lane configuration , and 'sgmiispeed'
- * for SGMII lanes
- */
- update_topology_satr(serdes_map_array);
- update_topology_sgmii_speed(serdes_map_array);
-
- return MV_OK;
-}
-
-int load_topology_db_amc(struct serdes_map *serdes_map_array)
-{
- u32 lane_num;
- struct serdes_map *topology_config_ptr;
-
- DEBUG_INIT_FULL_S("\n### load_topology_db_amc ###\n");
-
- printf("\nInitialize DB-AMC board topology\n");
- topology_config_ptr = db_amc_config_default;
-
- /* Update the default board topology device flavours */
- CHECK_STATUS(hws_update_device_toplogy
- (topology_config_ptr, DB_CONFIG_DEFAULT));
-
- /* Updating the topology map */
- for (lane_num = 0; lane_num < hws_serdes_get_max_lane(); lane_num++) {
- serdes_map_array[lane_num].serdes_mode =
- topology_config_ptr[lane_num].serdes_mode;
- serdes_map_array[lane_num].serdes_speed =
- topology_config_ptr[lane_num].serdes_speed;
- serdes_map_array[lane_num].serdes_type =
- topology_config_ptr[lane_num].serdes_type;
- serdes_map_array[lane_num].swap_rx =
- topology_config_ptr[lane_num].swap_rx;
- serdes_map_array[lane_num].swap_tx =
- topology_config_ptr[lane_num].swap_tx;
- }
-
- update_topology_sgmii_speed(serdes_map_array);
-
- return MV_OK;
-}
-
-int load_topology_rd(struct serdes_map *serdes_map_array)
-{
- u8 mode;
-
- DEBUG_INIT_FULL_S("\n### load_topology_rd ###\n");
-
- DEBUG_INIT_S("\nInit RD board ");
-
- /* Reading mode */
- DEBUG_INIT_FULL_S("load_topology_rd: getting mode\n");
- if (i2c_read(EEPROM_I2C_ADDR, 0, 2, &mode, 1)) {
- DEBUG_INIT_S("load_topology_rd: TWSI Read failed\n");
- return MV_FAIL;
- }
-
- /* Updating the topology map */
- DEBUG_INIT_FULL_S("load_topology_rd: Loading board topology details\n");
-
- /* RD mode: 0 = NAS, 1 = AP */
- if (((mode >> 1) & 0x1) == 0) {
- CHECK_STATUS(load_topology_rd_nas(serdes_map_array));
- } else {
- CHECK_STATUS(load_topology_rd_ap(serdes_map_array));
- }
-
- update_topology_sgmii_speed(serdes_map_array);
-
- return MV_OK;
-}
-
-int load_topology_rd_nas(struct serdes_map *serdes_map_array)
-{
- int is_sgmii = 0;
- u32 i;
-
- DEBUG_INIT_S("\nInit RD NAS topology ");
-
- /* check if lane 4 is USB3 or SGMII */
- if (load_topology_rd_sgmii_usb(&is_sgmii) != MV_OK) {
- DEBUG_INIT_S("load_topology_rd NAS: TWSI Read failed\n");
- return MV_FAIL;
- }
-
- /* Lane 0 */
- serdes_map_array[0].serdes_type = PEX0;
- serdes_map_array[0].serdes_speed = SERDES_SPEED_5_GBPS;
- serdes_map_array[0].serdes_mode = PEX_ROOT_COMPLEX_X1;
-
- /* Lane 1 */
- serdes_map_array[1].serdes_type = SATA0;
- serdes_map_array[1].serdes_speed = SERDES_SPEED_3_GBPS;
- serdes_map_array[1].serdes_mode = SERDES_DEFAULT_MODE;
-
- /* Lane 2 */
- serdes_map_array[2].serdes_type = SATA1;
- serdes_map_array[2].serdes_speed = SERDES_SPEED_3_GBPS;
- serdes_map_array[2].serdes_mode = SERDES_DEFAULT_MODE;
-
- /* Lane 3 */
- serdes_map_array[3].serdes_type = SATA3;
- serdes_map_array[3].serdes_speed = SERDES_SPEED_3_GBPS;
- serdes_map_array[3].serdes_mode = SERDES_DEFAULT_MODE;
-
- /* Lane 4 */
- if (is_sgmii == 1) {
- DEBUG_INIT_S("Serdes Lane 4 is SGMII\n");
- serdes_map_array[4].serdes_type = SGMII1;
- serdes_map_array[4].serdes_speed = SERDES_SPEED_3_125_GBPS;
- serdes_map_array[4].serdes_mode = SERDES_DEFAULT_MODE;
- } else {
- DEBUG_INIT_S("Serdes Lane 4 is USB3\n");
- serdes_map_array[4].serdes_type = USB3_HOST0;
- serdes_map_array[4].serdes_speed = SERDES_SPEED_5_GBPS;
- serdes_map_array[4].serdes_mode = SERDES_DEFAULT_MODE;
- }
-
- /* Lane 5 */
- serdes_map_array[5].serdes_type = SATA2;
- serdes_map_array[5].serdes_speed = SERDES_SPEED_3_GBPS;
- serdes_map_array[5].serdes_mode = SERDES_DEFAULT_MODE;
-
- /* init swap configuration */
- for (i = 0; i <= 5; i++) {
- serdes_map_array[i].swap_rx = 0;
- serdes_map_array[i].swap_tx = 0;
- }
-
- return MV_OK;
-}
-
-int load_topology_rd_ap(struct serdes_map *serdes_map_array)
-{
- int is_sgmii = 0;
- u32 i;
-
- DEBUG_INIT_S("\nInit RD AP topology ");
-
- /* check if lane 4 is USB3 or SGMII */
- if (load_topology_rd_sgmii_usb(&is_sgmii) != MV_OK) {
- DEBUG_INIT_S("load_topology_rd AP: TWSI Read failed\n");
- return MV_FAIL;
- }
-
- /* Lane 0 */
- serdes_map_array[0].serdes_type = DEFAULT_SERDES;
- serdes_map_array[0].serdes_speed = LAST_SERDES_SPEED;
- serdes_map_array[0].serdes_mode = SERDES_DEFAULT_MODE;
-
- /* Lane 1 */
- serdes_map_array[1].serdes_type = PEX0;
- serdes_map_array[1].serdes_speed = SERDES_SPEED_5_GBPS;
- serdes_map_array[1].serdes_mode = PEX_ROOT_COMPLEX_X1;
-
- /* Lane 2 */
- serdes_map_array[2].serdes_type = PEX1;
- serdes_map_array[2].serdes_speed = SERDES_SPEED_5_GBPS;
- serdes_map_array[2].serdes_mode = PEX_ROOT_COMPLEX_X1;
-
- /* Lane 3 */
- serdes_map_array[3].serdes_type = SATA3;
- serdes_map_array[3].serdes_speed = SERDES_SPEED_3_GBPS;
- serdes_map_array[3].serdes_mode = SERDES_DEFAULT_MODE;
-
- /* Lane 4 */
- if (is_sgmii == 1) {
- DEBUG_INIT_S("Serdes Lane 4 is SGMII\n");
- serdes_map_array[4].serdes_type = SGMII1;
- serdes_map_array[4].serdes_speed = SERDES_SPEED_3_125_GBPS;
- serdes_map_array[4].serdes_mode = SERDES_DEFAULT_MODE;
- } else {
- DEBUG_INIT_S("Serdes Lane 4 is USB3\n");
- serdes_map_array[4].serdes_type = USB3_HOST0;
- serdes_map_array[4].serdes_speed = SERDES_SPEED_5_GBPS;
- serdes_map_array[4].serdes_mode = SERDES_DEFAULT_MODE;
- }
-
- /* Lane 5 */
- serdes_map_array[5].serdes_type = SATA2;
- serdes_map_array[5].serdes_speed = SERDES_SPEED_3_GBPS;
- serdes_map_array[5].serdes_mode = SERDES_DEFAULT_MODE;
-
- /* init swap configuration */
- for (i = 0; i <= 5; i++) {
- serdes_map_array[i].swap_rx = 0;
- serdes_map_array[i].swap_tx = 0;
- }
-
- return MV_OK;
-}
-
-int load_topology_rd_sgmii_usb(int *is_sgmii)
-{
- u8 mode;
-
- /*
- * DB-GP board: Device 6810 supports only 2 GbE ports:
- * SGMII2 not supported (USE USB3 Host instead)
- */
- if (sys_env_device_id_get() == MV_6810) {
- printf("Device 6810 supports only 2 GbE ports: SGMII-2 @ lane5 disabled (setting USB3.0 H1 instead)\n");
- *is_sgmii = 0;
- return MV_OK;
- }
-
- if (!i2c_read(RD_GET_MODE_ADDR, 1, 2, &mode, 1)) {
- *is_sgmii = ((mode >> 2) & 0x1);
- } else {
- /* else use the default - USB3 */
- *is_sgmii = 0;
- }
-
- if (*is_sgmii)
- is_custom_topology = 1;
-
- printf("Lane 5 detection: %s\n",
- *is_sgmii ? "SGMII2" : "USB3.0 Host Port 1");
-
- return MV_OK;
-}
-
-/*
- * 'usb3port0'/'usb3port1' fields are located in EEPROM,
- * at 3rd byte(offset=2), bit 0:1 (respectively)
- */
-int load_topology_usb_mode_get(u8 *twsi_data)
-{
- if (!i2c_read(EEPROM_I2C_ADDR, 2, 2, twsi_data, 1))
- return MV_OK;
-
- return MV_ERROR;
-}
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_topology_spec.h b/arch/arm/mach-mvebu/serdes/a38x/high_speed_topology_spec.h
deleted file mode 100644
index 3cfb1c7..0000000
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_topology_spec.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * Copyright (C) Marvell International Ltd. and its affiliates
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-#ifndef _HIGHSPEED_TOPOLOGY_SPEC_H
-#define _HIGHSPEED_TOPOLOGY_SPEC_H
-
-#include "high_speed_env_spec.h"
-
-/* Topology map options for the DB_A38X_BP board */
-enum topology_config_db {
- DB_CONFIG_SLM1363_C,
- DB_CONFIG_SLM1363_D,
- DB_CONFIG_SLM1363_E,
- DB_CONFIG_SLM1363_F,
- DB_CONFIG_SLM1364_D,
- DB_CONFIG_SLM1364_E,
- DB_CONFIG_SLM1364_F,
- DB_CONFIG_DEFAULT,
- DB_NO_TOPOLOGY
-};
-
-/*
- * this enum must be aligned with topology_config_db_381 array,
- * every update to this enum requires update to topology_config_db_381
- * array
- */
-enum topology_config_db381 {
- DB_CONFIG_SLM1427, /* enum for db_config_slm1427 */
- DB_CONFIG_SLM1426, /* enum for db_config_slm1426 */
- DB_381_CONFIG_DEFAULT,
- DB_381_NO_TOPOLOGY
-};
-
-/* A generic function pointer for loading the board topology map */
-typedef int (*load_topology_func_ptr)(struct serdes_map *serdes_map_array);
-
-extern load_topology_func_ptr load_topology_func_arr[];
-
-/*
- * topology_config_db_mode_get -
- *
- * DESCRIPTION: Gets the relevant topology mode (index).
- * for load_topology_db use only.
- * INPUT: None.
- * OUTPUT: None.
- * RETURNS: the topology mode
- */
-u8 topology_config_db_mode_get(void);
-
-/*
- * load_topology_xxx -
- *
- * DESCRIPTION: Loads the board topology for the XXX board
- * INPUT: serdes_map_array - The struct that will contain
- * the board topology map
- * OUTPUT: The board topology map.
- * RETURNS: MV_OK for success
- * MV_FAIL for failure (a wrong topology mode was read
- * from the board)
- */
-
-/* load_topology_db - Loads the board topology for DB Board */
-int load_topology_db(struct serdes_map *serdes_map_array);
-
-/* load_topology_rd - Loads the board topology for RD Board */
-int load_topology_rd(struct serdes_map *serdes_map_array);
-
-/* load_topology_rd_nas - Loads the board topology for RD NAS Board */
-int load_topology_rd_nas(struct serdes_map *serdes_map_array);
-
-/* load_topology_rd_ap - Loads the board topology for RD Ap Board */
-int load_topology_rd_ap(struct serdes_map *serdes_map_array);
-
-/* load_topology_db_ap - Loads the board topology for DB-AP Board */
-int load_topology_db_ap(struct serdes_map *serdes_map_array);
-
-/* load_topology_db_gp - Loads the board topology for DB GP Board */
-int load_topology_db_gp(struct serdes_map *serdes_map_array);
-
-/* load_topology_db_381 - Loads the board topology for 381 DB-BP Board */
-int load_topology_db_381(struct serdes_map *serdes_map_array);
-
-/* load_topology_db_amc - Loads the board topology for DB-AMC Board */
-int load_topology_db_amc(struct serdes_map *serdes_map_array);
-
-/*
- * hws_update_device_toplogy
- * DESCRIPTION: Update the default board topology for specific device Id
- * INPUT:
- * topology_config_ptr - pointer to the Serdes mapping
- * topology_mode - topology mode (index)
- * OUTPUT: None
- * RRETURNS:
- * MV_OK - if updating the board topology success
- * MV_BAD_PARAM - if the input parameter is wrong
- */
-int hws_update_device_toplogy(struct serdes_map *topology_config_ptr,
- enum topology_config_db topology_mode);
-
-/*
- * load_topology_rd_sgmii_usb -
- *
- * DESCRIPTION: For RD board check if lane 4 is USB3 or SGMII
- * INPUT: None
- * OUTPUT: is_sgmii - return 1 if lane 4 is SGMII
- * return 0 if lane 4 is USB.
- * RETURNS: MV_OK for success
- */
-int load_topology_rd_sgmii_usb(int *is_sgmii);
-
-/*
- * load_topology_usb_mode_get -
- *
- * DESCRIPTION: For DB board check if USB3.0 mode
- * INPUT: None
- * OUTPUT: twsi_data - return data read from S@R via I2C
- * RETURNS: MV_OK for success
- */
-int load_topology_usb_mode_get(u8 *twsi_data);
-
-#endif /* _HIGHSPEED_TOPOLOGY_SPEC_H */
diff --git a/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c b/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c
index ee2305b..905b907 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c
@@ -5,7 +5,6 @@
*/
#include <common.h>
-#include <i2c.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
index efd3873..49d704a 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
@@ -5,7 +5,6 @@
*/
#include <common.h>
-#include <i2c.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
@@ -236,153 +235,3 @@
return g_dev_id;
}
-
-#ifdef MV_DDR_TOPOLOGY_UPDATE_FROM_TWSI
-/*
-* sys_env_get_topology_update_info
-* DESCRIPTION: Read TWSI fields to update DDR topology structure
-* INPUT: None
-* OUTPUT: None, 0 means no topology update
-* RETURN:
-* Bit mask of changes topology features
-*/
-#ifdef CONFIG_ARMADA_39X
-u32 sys_env_get_topology_update_info(
- struct topology_update_info *tui)
-{
- /* Set 16/32 bit configuration*/
- tui->update_width = 1;
- tui->width = TOPOLOGY_UPDATE_WIDTH_32BIT;
-
-#ifdef CONFIG_DDR3
- if (1 == sys_env_config_get(MV_CONFIG_DDR_BUSWIDTH)) {
- /* 16bit */
- tui->width = TOPOLOGY_UPDATE_WIDTH_16BIT;
- } else {
- /* 32bit */
- tui->width = TOPOLOGY_UPDATE_WIDTH_32BIT;
- }
-#endif
-
- /* Set ECC/no ECC bit configuration */
- tui->update_ecc = 1;
- if (0 == sys_env_config_get(MV_CONFIG_DDR_ECC_EN)) {
- /* NO ECC */
- tui->ecc = TOPOLOGY_UPDATE_ECC_OFF;
- } else {
- /* ECC */
- tui->ecc = TOPOLOGY_UPDATE_ECC_ON;
- }
-
- tui->update_ecc_pup3_mode = 1;
- tui->ecc_pup_mode_offset = TOPOLOGY_UPDATE_ECC_OFFSET_PUP4;
-
- return MV_OK;
-}
-#else /*CONFIG_ARMADA_38X*/
-u32 sys_env_get_topology_update_info(
- struct topology_update_info *tui)
-{
- u8 config_val;
- u8 ecc_mode[A38X_MV_MAX_MARVELL_BOARD_ID -
- A38X_MARVELL_BOARD_ID_BASE][5] = TOPOLOGY_UPDATE;
- u8 board_id = mv_board_id_get();
- int ret;
-
- board_id = mv_board_id_index_get(board_id);
- ret = i2c_read(EEPROM_I2C_ADDR, 0, 2, &config_val, 1);
- if (ret) {
- DEBUG_INIT_S("sys_env_get_topology_update_info: TWSI Read failed\n");
- return 0;
- }
-
- /* Set 16/32 bit configuration */
- if ((0 == (config_val & DDR_SATR_CONFIG_MASK_WIDTH)) ||
- (ecc_mode[board_id][TOPOLOGY_UPDATE_32BIT] == 0)) {
- /* 16bit by SatR of 32bit mode not supported for the board */
- if ((ecc_mode[board_id][TOPOLOGY_UPDATE_16BIT] != 0)) {
- tui->update_width = 1;
- tui->width = TOPOLOGY_UPDATE_WIDTH_16BIT;
- }
- } else {
- /* 32bit */
- if ((ecc_mode[board_id][TOPOLOGY_UPDATE_32BIT] != 0)) {
- tui->update_width = 1;
- tui->width = TOPOLOGY_UPDATE_WIDTH_32BIT;
- }
- }
-
- /* Set ECC/no ECC bit configuration */
- if (0 == (config_val & DDR_SATR_CONFIG_MASK_ECC)) {
- /* NO ECC */
- tui->update_ecc = 1;
- tui->ecc = TOPOLOGY_UPDATE_ECC_OFF;
- } else {
- /* ECC */
- if ((ecc_mode[board_id][TOPOLOGY_UPDATE_32BIT_ECC] != 0) ||
- (ecc_mode[board_id][TOPOLOGY_UPDATE_16BIT_ECC] != 0) ||
- (ecc_mode[board_id][TOPOLOGY_UPDATE_16BIT_ECC_PUP3] != 0)) {
- tui->update_ecc = 1;
- tui->ecc = TOPOLOGY_UPDATE_ECC_ON;
- }
- }
-
- /* Set ECC pup bit configuration */
- if (0 == (config_val & DDR_SATR_CONFIG_MASK_ECC_PUP)) {
- /* PUP3 */
- /*
- * Check if PUP3 configuration allowed, if not -
- * force Pup4 with warning message
- */
- if ((ecc_mode[board_id][TOPOLOGY_UPDATE_16BIT_ECC_PUP3] != 0)) {
- if (tui->width == TOPOLOGY_UPDATE_WIDTH_16BIT) {
- tui->update_ecc_pup3_mode = 1;
- tui->ecc_pup_mode_offset =
- TOPOLOGY_UPDATE_ECC_OFFSET_PUP3;
- } else {
- if ((ecc_mode[board_id][TOPOLOGY_UPDATE_32BIT_ECC] != 0)) {
- printf("DDR Topology Update: ECC PUP3 not valid for 32bit mode, force ECC in PUP4\n");
- tui->update_ecc_pup3_mode = 1;
- tui->ecc_pup_mode_offset =
- TOPOLOGY_UPDATE_ECC_OFFSET_PUP4;
- }
- }
- } else {
- if (ecc_mode[board_id][TOPOLOGY_UPDATE_16BIT_ECC] !=
- 0) {
- printf("DDR Topology Update: ECC on PUP3 not supported, force ECC on PUP4\n");
- tui->update_ecc_pup3_mode = 1;
- tui->ecc_pup_mode_offset =
- TOPOLOGY_UPDATE_ECC_OFFSET_PUP4;
- }
- }
- } else {
- /* PUP4 */
- if ((ecc_mode[board_id][TOPOLOGY_UPDATE_32BIT_ECC] != 0) ||
- (ecc_mode[board_id][TOPOLOGY_UPDATE_16BIT_ECC] != 0)) {
- tui->update_ecc_pup3_mode = 1;
- tui->ecc_pup_mode_offset =
- TOPOLOGY_UPDATE_ECC_OFFSET_PUP4;
- }
- }
-
- /*
- * Check for forbidden ECC mode,
- * if by default width and pup selection set 32bit ECC mode and this
- * mode not supported for the board - config 16bit with ECC on PUP3
- */
- if ((tui->ecc == TOPOLOGY_UPDATE_ECC_ON) &&
- (tui->width == TOPOLOGY_UPDATE_WIDTH_32BIT)) {
- if (ecc_mode[board_id][TOPOLOGY_UPDATE_32BIT_ECC] == 0) {
- printf("DDR Topology Update: 32bit mode with ECC not allowed on this board, forced 16bit with ECC on PUP3\n");
- tui->width = TOPOLOGY_UPDATE_WIDTH_16BIT;
- tui->update_ecc_pup3_mode = 1;
- tui->ecc_pup_mode_offset =
- TOPOLOGY_UPDATE_ECC_OFFSET_PUP3;
- }
- }
-
- return MV_OK;
-}
-#endif /* CONFIG_ARMADA_38X */
-#endif /* MV_DDR_TOPOLOGY_UPDATE_FROM_TWSI */
diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
index 3e5373c..a413c51 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
+++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
@@ -364,8 +364,6 @@
u32 sys_env_device_id_get(void);
u16 sys_env_model_get(void);
struct dlb_config *sys_env_dlb_config_ptr_get(void);
-u32 sys_env_get_topology_update_info(
- struct topology_update_info *topology_update_info);
u32 sys_env_get_cs_ena_from_reg(void);
#endif /* _SYS_ENV_LIB_H */
diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
index 84ca55c..e700781 100644
--- a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
+++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
@@ -13,6 +13,7 @@
#include <asm/arch/soc.h>
#include "../drivers/ddr/marvell/a38x/ddr3_a38x_topology.h"
+#include <../serdes/a38x/high_speed_env_spec.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -55,6 +56,22 @@
{ 0x21, 3, 0xC0 } /* Output Data, register#1 */
};
+static struct serdes_map board_serdes_map[] = {
+ {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
+ {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
+ {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
+ {SATA3, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
+ {SATA2, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
+ {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}
+};
+
+int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count)
+{
+ *serdes_map_array = board_serdes_map;
+ *count = ARRAY_SIZE(board_serdes_map);
+ return 0;
+}
+
/*
* Define the DDR layout / topology here in the board file. This will
* be used by the DDR3 init code in the SPL U-Boot version to configure
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 501fbbf..ec2a749 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -5,3 +5,8 @@
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPI_FLASH=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_USB=y
diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig
index 20b83e3..b7f79a3 100644
--- a/configs/guruplug_defconfig
+++ b/configs/guruplug_defconfig
@@ -4,3 +4,8 @@
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_USB=y
diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig
index 194ef02..19cbfd5 100644
--- a/configs/ib62x0_defconfig
+++ b/configs/ib62x0_defconfig
@@ -5,3 +5,8 @@
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_USB=y
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index 54e2ad7..5a37eea 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -4,3 +4,8 @@
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_USB=y
diff --git a/drivers/ddr/marvell/a38x/ddr3_a38x.h b/drivers/ddr/marvell/a38x/ddr3_a38x.h
index 49621bc..1ed5174 100644
--- a/drivers/ddr/marvell/a38x/ddr3_a38x.h
+++ b/drivers/ddr/marvell/a38x/ddr3_a38x.h
@@ -12,11 +12,6 @@
#include "ddr3_hws_hw_training_def.h"
-/* Allow topolgy update from board TWSI device*/
-#if !defined(CONFIG_CUSTOMER_BOARD_SUPPORT)
-#define MV_DDR_TOPOLOGY_UPDATE_FROM_TWSI
-#endif
-
#define ECC_SUPPORT
/* right now, we're not supporting this in mainline */
diff --git a/drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h b/drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h
index 7500a72..06d0ab1 100644
--- a/drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h
+++ b/drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h
@@ -23,8 +23,8 @@
#define CPU_CONFIGURATION_REG(id) (0x21800 + (id * 0x100))
#define CPU_MRVL_ID_OFFSET 0x10
-#define SAR1_CPU_CORE_MASK 0x00000018
-#define SAR1_CPU_CORE_OFFSET 3
+#define SAR1_CPU_CORE_MASK 0x38000000
+#define SAR1_CPU_CORE_OFFSET 27
#define NEW_FABRIC_TWSI_ADDR 0x4e
#ifdef DB_784MP_GP
@@ -461,7 +461,4 @@
#define CLK_CPU_2200 13
#define CLK_CPU_2400 14
-#define SAR1_CPU_CORE_MASK 0x00000018
-#define SAR1_CPU_CORE_OFFSET 3
-
#endif /* _DDR3_HWS_HW_TRAINING_DEF_H */
diff --git a/drivers/ddr/marvell/a38x/ddr3_init.c b/drivers/ddr/marvell/a38x/ddr3_init.c
index d6ed8e0..556f877 100644
--- a/drivers/ddr/marvell/a38x/ddr3_init.c
+++ b/drivers/ddr/marvell/a38x/ddr3_init.c
@@ -96,7 +96,6 @@
static u32 ddr3_get_static_ddr_mode(void);
#endif
static int ddr3_hws_tune_training_params(u8 dev_num);
-static int ddr3_update_topology_map(struct hws_topology_map *topology_map);
/* device revision */
#define DEV_VERSION_ID_REG 0x1823c
@@ -383,14 +382,6 @@
}
#endif
- /* Load topology for New Training IP */
- status = ddr3_load_topology_map();
- if (MV_OK != status) {
- printf("%s Training Sequence topology load - FAILED\n",
- ddr_type);
- return status;
- }
-
/* Tune training algo paramteres */
status = ddr3_hws_tune_training_params(0);
if (MV_OK != status)
@@ -539,27 +530,6 @@
return cs_count;
}
-/*
- * Name: ddr3_load_topology_map
- * Desc:
- * Args:
- * Notes:
- * Returns:
- */
-int ddr3_load_topology_map(void)
-{
- struct hws_topology_map *tm = ddr3_get_topology_map();
-
-#if defined(MV_DDR_TOPOLOGY_UPDATE_FROM_TWSI)
- /* Update topology data */
- if (MV_OK != ddr3_update_topology_map(tm)) {
- DEBUG_INIT_FULL_S("Failed update of DDR3 Topology map\n");
- }
-#endif
-
- return MV_OK;
-}
-
void get_target_freq(u32 freq_mode, u32 *ddr_freq, u32 *hclk_ps)
{
u32 tmp, hclk = 200;
@@ -781,48 +751,6 @@
return MV_OK;
}
-#if defined(MV_DDR_TOPOLOGY_UPDATE_FROM_TWSI)
-/*
- * Name: ddr3_update_topology_map
- * Desc:
- * Args:
- * Notes: Update topology map by Sat_r values
- * Returns:
- */
-static int ddr3_update_topology_map(struct hws_topology_map *tm)
-{
- struct topology_update_info topology_update_info;
-
- topology_update_info.update_width = 0;
- topology_update_info.update_ecc = 0;
- topology_update_info.update_ecc_pup3_mode = 0;
- sys_env_get_topology_update_info(&topology_update_info);
- if (topology_update_info.update_width) {
- tm->bus_act_mask &=
- ~(TOPOLOGY_UPDATE_WIDTH_32BIT_MASK);
- if (topology_update_info.width == TOPOLOGY_UPDATE_WIDTH_16BIT)
- tm->bus_act_mask =
- TOPOLOGY_UPDATE_WIDTH_16BIT_MASK;
- else
- tm->bus_act_mask =
- TOPOLOGY_UPDATE_WIDTH_32BIT_MASK;
- }
-
- if (topology_update_info.update_ecc) {
- if (topology_update_info.ecc == TOPOLOGY_UPDATE_ECC_OFF) {
- tm->bus_act_mask &=
- ~(1 << topology_update_info.ecc_pup_mode_offset);
- } else {
- tm->bus_act_mask |=
- topology_update_info.
- ecc << topology_update_info.ecc_pup_mode_offset;
- }
- }
-
- return MV_OK;
-}
-#endif
-
/*
* Name: ddr3_hws_tune_training_params
* Desc:
diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h
index 2815ad8..3f35616 100644
--- a/include/configs/dreamplug.h
+++ b/include/configs/dreamplug.h
@@ -34,31 +34,19 @@
* High Level Configuration Options (easy to change)
*/
#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */
-#define CONFIG_KW88F6281 1 /* SOC Name */
#define CONFIG_MACH_TYPE MACH_TYPE_DREAMPLUG
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-
-/* Add target to build it automatically upon "make" */
-#define CONFIG_BUILD_TARGET "u-boot.kwb"
/*
* Commands configuration
*/
-#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_ENV
+#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
-#define CONFIG_CMD_SF
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_USB
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_DATE
/*
- * mv-common.h should be defined after CMD configs since it used them
+ * mv-plug-common.h should be defined after CMD configs since it used them
* to enable certain macros
*/
-#include "mv-common.h"
+#include "mv-plug-common.h"
/*
* Environment variables configurations
@@ -118,20 +106,4 @@
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
#endif /*CONFIG_MVSATA_IDE*/
-/*
- * RTC driver configuration
- */
-#ifdef CONFIG_CMD_DATE
-#define CONFIG_RTC_MV
-#endif /* CONFIG_CMD_DATE */
-
-#define CONFIG_SYS_ALT_MEMTEST
-
-/*
- * display enhanced info about the cpu at boot.
- */
-#define CONFIG_DISPLAY_CPUINFO
-
-#define CONFIG_OF_LIBFDT
-
#endif /* _CONFIG_DREAMPLUG_H */
diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h
index 675ec52..712bfd7 100644
--- a/include/configs/guruplug.h
+++ b/include/configs/guruplug.h
@@ -20,46 +20,18 @@
* High Level Configuration Options (easy to change)
*/
#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */
-#define CONFIG_KW88F6281 1 /* SOC Name */
#define CONFIG_MACH_GURUPLUG /* Machine type */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
/*
- * Compression configuration
+ * Standard filesystems
*/
-#define CONFIG_BZIP2
-#define CONFIG_LZMA
-#define CONFIG_LZO
+#define CONFIG_SYS_MVFS
/*
- * Enable device tree support
- */
-#define CONFIG_OF_LIBFDT
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
-
-/*
- * Commands configuration
- */
-#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
-#define CONFIG_CMD_BOOTZ
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_ENV
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_USB
-#define CONFIG_CMD_FAT
-
-/*
- * mv-common.h should be defined after CMD configs since it used them
+ * mv-plug-common.h should be defined after CMD configs since it used them
* to enable certain macros
*/
-#include "mv-common.h"
+#include "mv-plug-common.h"
/*
* Environment variables configurations
@@ -123,20 +95,4 @@
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
#endif /*CONFIG_MVSATA_IDE*/
-/*
- * File system
- */
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_EXT4
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_UBI
-#define CONFIG_CMD_UBIFS
-#define CONFIG_RBTREE
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_CMD_MTDPARTS
-
-#define CONFIG_SYS_ALT_MEMTEST
-
#endif /* _CONFIG_GURUPLUG_H */
diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h
index 594fceb..57b1a43 100644
--- a/include/configs/ib62x0.h
+++ b/include/configs/ib62x0.h
@@ -9,7 +9,6 @@
#ifndef _CONFIG_IB62x0_H
#define _CONFIG_IB62x0_H
-
/*
* Version number information
*/
@@ -22,35 +21,23 @@
#define CONFIG_KW88F6281 /* SOC Name */
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-/*
- * Machine type
- */
-#define CONFIG_MACH_TYPE MACH_TYPE_NAS6210
-
-/*
- * Enable device tree support
- */
-#define CONFIG_OF_LIBFDT
+/* Add target to build it automatically upon "make" */
+#define CONFIG_BUILD_TARGET "u-boot.kwb"
/*
* Compression configuration
*/
#define CONFIG_BZIP2
#define CONFIG_LZMA
-#define CONFIG_LZO
/*
* Commands configuration
*/
#define CONFIG_SYS_NO_FLASH /* declare no flash (NOR/SPI) */
#define CONFIG_SYS_MVFS
-#define CONFIG_CMD_ENV
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_IDE
#define CONFIG_CMD_MII
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_USB
/*
* mv-common.h should be defined after CMD configs since it used them
@@ -126,17 +113,4 @@
#define CONFIG_RTC_MV
#endif /* CONFIG_CMD_DATE */
-/*
- * File system
- */
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_UBI
-#define CONFIG_CMD_UBIFS
-#define CONFIG_RBTREE
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_CMD_MTDPARTS
-
#endif /* _CONFIG_IB62x0_H */
diff --git a/include/configs/mv-plug-common.h b/include/configs/mv-plug-common.h
new file mode 100644
index 0000000..d7d8d81
--- /dev/null
+++ b/include/configs/mv-plug-common.h
@@ -0,0 +1,64 @@
+/*
+ * (C) Copyright 2009-2015
+ * Marvell Semiconductor <www.marvell.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _CONFIG_MARVELL_PLUG_H
+#define _CONFIG_MARVELL_PLUG_H
+
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_KW88F6281 1 /* SOC Name */
+#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
+
+/* Add target to build it automatically upon "make" */
+#define CONFIG_BUILD_TARGET "u-boot.kwb"
+
+/*
+ * Compression configuration
+ */
+#ifdef CONFIG_SYS_MVFS
+#define CONFIG_BZIP2
+#define CONFIG_LZMA
+#define CONFIG_CMD_BOOTZ
+#endif /* CONFIG_SYS_MVFS */
+
+/*
+ * Enable device tree support
+ */
+#define CONFIG_OF_LIBFDT
+
+/*
+ * Commands configuration
+ */
+#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_MII
+
+/*
+ * Extra file system
+ */
+#define CONFIG_CMD_EXT4
+
+/*
+ * mv-common.h should be defined after CMD configs since it used them
+ * to enable certain macros
+ */
+#include "mv-common.h"
+
+/*
+ * RTC driver configuration
+ */
+#ifdef CONFIG_CMD_DATE
+#define CONFIG_RTC_MV
+#endif /* CONFIG_CMD_DATE */
+
+#define CONFIG_SYS_ALT_MEMTEST
+
+#endif /* _CONFIG_MARVELL_PLUG_H */
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index 76cdbe0..ebc3d64 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@ -20,46 +20,23 @@
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
-#define CONFIG_KW88F6281 1 /* SOC Name */
#define CONFIG_MACH_SHEEVAPLUG /* Machine type */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-
-/*
- * Compression configuration
- */
-#define CONFIG_BZIP2
-#define CONFIG_LZMA
-#define CONFIG_LZO
-
-/*
- * Enable device tree support
- */
-#define CONFIG_OF_LIBFDT
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
/*
* Commands configuration
*/
-#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
-#define CONFIG_CMD_BOOTZ
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_ENV
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_USB
/*
- * mv-common.h should be defined after CMD configs since it used them
+ * Standard filesystems
+ */
+#define CONFIG_SYS_MVFS
+
+/*
+ * mv-plug-common.h should be defined after CMD configs since it used them
* to enable certain macros
*/
-#include "mv-common.h"
+#include "mv-plug-common.h"
/*
* Environment variables configurations
@@ -132,18 +109,4 @@
#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET
#endif /* CONFIG_CMD_IDE */
-/*
- * File system
- */
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_EXT4
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_UBI
-#define CONFIG_CMD_UBIFS
-#define CONFIG_RBTREE
-#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_CMD_MTDPARTS
-
#endif /* _CONFIG_SHEEVAPLUG_H */
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index d33f1b6..5f6d91c 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -417,7 +417,13 @@
binhdrsz = sizeof(struct opt_hdr_v1) +
(binarye->binary.nargs + 1) * sizeof(unsigned int) +
s.st_size;
- binhdrsz = ALIGN_SUP(binhdrsz, 32);
+
+ /*
+ * The size includes the binary image size, rounded
+ * up to a 4-byte boundary. Plus 4 bytes for the
+ * next-header byte and 3-byte alignment at the end.
+ */
+ binhdrsz = ALIGN_SUP(binhdrsz, 4) + 4;
hdr->headersz_lsb = binhdrsz & 0xFFFF;
hdr->headersz_msb = (binhdrsz & 0xFFFF0000) >> 16;
@@ -441,7 +447,7 @@
fclose(bin);
- cur += s.st_size;
+ cur += ALIGN_SUP(s.st_size, 4);
/*
* For now, we don't support more than one binary
@@ -449,7 +455,7 @@
* supported. So, the binary header is necessarily the
* last one
*/
- *((unsigned char *)cur) = 0;
+ *((uint32_t *)cur) = 0x00000000;
cur += sizeof(uint32_t);
}