* Patch by Leif Lindholm, 23 Sep 2004:
add support for the AMD db1550 board
* Patch by Travis Sawyer, 15 Sep 2004:
Add CONFIG_SERIAL_MULTI support for ppc4xx,
update README.serial_multi
diff --git a/cpu/ppc4xx/serial.c b/cpu/ppc4xx/serial.c
index 41402cc..4abd3fc 100644
--- a/cpu/ppc4xx/serial.c
+++ b/cpu/ppc4xx/serial.c
@@ -41,13 +41,20 @@
* LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
*/
/*------------------------------------------------------------------------------- */
-
+/*
+ * Travis Sawyer 15 September 2004
+ * Added CONFIG_SERIAL_MULTI support
+ */
#include <common.h>
#include <commproc.h>
#include <asm/processor.h>
#include <watchdog.h>
#include "vecnum.h"
+#ifdef CONFIG_SERIAL_MULTI
+#include <serial.h>
+#endif
+
#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
#include <malloc.h>
#endif
@@ -147,7 +154,6 @@
#define asyncXOFFchar 0x13
#define asyncXONchar 0x11
-
/*
* Minimal serial functions needed to use one of the SMC ports
* as serial console interface.
@@ -177,7 +183,6 @@
return (0);
}
-
void serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
@@ -190,7 +195,6 @@
out8 (SPU_BASE + spu_BRateDivh, ((br_reg & 0xff00) >> 8)); /* ... */
}
-
void serial_putc (const char c)
{
if (c == '\n')
@@ -208,7 +212,6 @@
}
}
-
void serial_puts (const char *s)
{
while (*s) {
@@ -216,7 +219,6 @@
}
}
-
int serial_getc ()
{
unsigned char status = 0;
@@ -240,7 +242,6 @@
return (0x000000ff & (int) in8 (asyncRxBufferport1));
}
-
int serial_tstc ()
{
unsigned char status;
@@ -264,7 +265,6 @@
#endif /* CONFIG_IOP480 */
-
/*****************************************************************************/
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) || defined(CONFIG_405EP)
@@ -350,7 +350,6 @@
/*#define asyncTxBufferport1 ACTING_UART0_BASE+0x00 */
/*#define asyncRxBufferport1 ACTING_UART0_BASE+0x00 */
-
#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
/*-----------------------------------------------------------------------------+
| Fifo
@@ -364,7 +363,6 @@
volatile static serial_buffer_t buf_info;
#endif
-
#if defined(CONFIG_440) && !defined(CFG_EXT_SERIAL_CLOCK)
static void serial_divs (int baudrate, unsigned long *pudiv,
unsigned short *pbdiv )
@@ -411,14 +409,17 @@
}
#endif /* defined(CONFIG_440) && !defined(CFG_EXT_SERIAL_CLK */
-
/*
* Minimal serial functions needed to use one of the SMC ports
* as serial console interface.
*/
#if defined(CONFIG_440)
-int serial_init (void)
+#if defined(CONFIG_SERIAL_MULTI)
+int serial_init_dev (unsigned long dev_base)
+#else
+int serial_init(void)
+#endif
{
DECLARE_GLOBAL_DATA_PTR;
@@ -431,8 +432,18 @@
#endif
#if defined(CONFIG_440_GX)
+#if defined(CONFIG_SERIAL_MULTI)
+ if (UART0_BASE == dev_base) {
+ mfsdr(UART0_SDR,reg);
+ reg &= ~CR0_MASK;
+ } else {
+ mfsdr(UART1_SDR,reg);
+ reg &= ~CR0_MASK;
+ }
+#else
mfsdr(UART0_SDR,reg);
reg &= ~CR0_MASK;
+#endif
#else
reg = mfdcr(cntrl0) & ~CR0_MASK;
#endif /* CONFIG_440_GX */
@@ -451,11 +462,32 @@
#if defined(CONFIG_440_GX)
reg |= udiv << CR0_UDIV_POS; /* set the UART divisor */
+#if defined(CONFIG_SERIAL_MULTI)
+ if (UART0_BASE == dev_base) {
+ mtsdr (UART0_SDR,reg);
+ } else {
+ mtsdr (UART1_SDR,reg);
+ }
+#else
mtsdr (UART0_SDR,reg);
+#endif
#else
reg |= (udiv - 1) << CR0_UDIV_POS; /* set the UART divisor */
mtdcr (cntrl0, reg);
#endif
+
+#if defined(CONFIG_SERIAL_MULTI)
+ out8 (dev_base + UART_LCR, 0x80); /* set DLAB bit */
+ out8 (dev_base + UART_DLL, bdiv); /* set baudrate divisor */
+ out8 (dev_base + UART_DLM, bdiv >> 8);/* set baudrate divisor */
+ out8 (dev_base + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */
+ out8 (dev_base + UART_FCR, 0x00); /* disable FIFO */
+ out8 (dev_base + UART_MCR, 0x00); /* no modem control DTR RTS */
+ val = in8 (dev_base + UART_LSR); /* clear line status */
+ val = in8 (dev_base + UART_RBR); /* read receive buffer */
+ out8 (dev_base + UART_SCR, 0x00); /* set scratchpad */
+ out8 (dev_base + UART_IER, 0x00); /* set interrupt enable reg */
+#else
out8 (ACTING_UART0_BASE + UART_LCR, 0x80); /* set DLAB bit */
out8 (ACTING_UART0_BASE + UART_DLL, bdiv); /* set baudrate divisor */
out8 (ACTING_UART0_BASE + UART_DLM, bdiv >> 8);/* set baudrate divisor */
@@ -466,13 +498,17 @@
val = in8 (ACTING_UART0_BASE + UART_RBR); /* read receive buffer */
out8 (ACTING_UART0_BASE + UART_SCR, 0x00); /* set scratchpad */
out8 (ACTING_UART0_BASE + UART_IER, 0x00); /* set interrupt enable reg */
-
+#endif
return (0);
}
#else /* !defined(CONFIG_440) */
+#if defined(CONFIG_SERIAL_MULTI)
+int serial_init_dev (unsigned long dev_base)
+#else
int serial_init (void)
+#endif
{
DECLARE_GLOBAL_DATA_PTR;
@@ -517,6 +553,18 @@
tmp = gd->baudrate * udiv * 16;
bdiv = (clk + tmp / 2) / tmp;
+#if defined(CONFIG_SERIAL_MULTI)
+ out8 (dev_base + UART_LCR, 0x80); /* set DLAB bit */
+ out8 (dev_base + UART_DLL, bdiv); /* set baudrate divisor */
+ out8 (dev_base + UART_DLM, bdiv >> 8);/* set baudrate divisor */
+ out8 (dev_base + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */
+ out8 (dev_base + UART_FCR, 0x00); /* disable FIFO */
+ out8 (dev_base + UART_MCR, 0x00); /* no modem control DTR RTS */
+ val = in8 (dev_base + UART_LSR); /* clear line status */
+ val = in8 (dev_base + UART_RBR); /* read receive buffer */
+ out8 (dev_base + UART_SCR, 0x00); /* set scratchpad */
+ out8 (dev_base + UART_IER, 0x00); /* set interrupt enable reg */
+#else
out8 (ACTING_UART0_BASE + UART_LCR, 0x80); /* set DLAB bit */
out8 (ACTING_UART0_BASE + UART_DLL, bdiv); /* set baudrate divisor */
out8 (ACTING_UART0_BASE + UART_DLM, bdiv >> 8);/* set baudrate divisor */
@@ -527,13 +575,17 @@
val = in8 (ACTING_UART0_BASE + UART_RBR); /* read receive buffer */
out8 (ACTING_UART0_BASE + UART_SCR, 0x00); /* set scratchpad */
out8 (ACTING_UART0_BASE + UART_IER, 0x00); /* set interrupt enable reg */
-
+#endif
return (0);
}
#endif /* if defined(CONFIG_440) */
+#if defined(CONFIG_SERIAL_MULTI)
+void serial_setbrg_dev (unsigned long dev_base)
+#else
void serial_setbrg (void)
+#endif
{
DECLARE_GLOBAL_DATA_PTR;
@@ -556,39 +608,71 @@
tmp = gd->baudrate * udiv * 16;
bdiv = (clk + tmp / 2) / tmp;
+#if defined(CONFIG_SERIAL_MULTI)
+ out8 (dev_base + UART_LCR, 0x80); /* set DLAB bit */
+ out8 (dev_base + UART_DLL, bdiv); /* set baudrate divisor */
+ out8 (dev_base + UART_DLM, bdiv >> 8);/* set baudrate divisor */
+ out8 (dev_base + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */
+#else
out8 (ACTING_UART0_BASE + UART_LCR, 0x80); /* set DLAB bit */
out8 (ACTING_UART0_BASE + UART_DLL, bdiv); /* set baudrate divisor */
out8 (ACTING_UART0_BASE + UART_DLM, bdiv >> 8);/* set baudrate divisor */
out8 (ACTING_UART0_BASE + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */
+#endif
}
-
+#if defined(CONFIG_SERIAL_MULTI)
+void serial_putc_dev (unsigned long dev_base, const char c)
+#else
void serial_putc (const char c)
+#endif
{
int i;
if (c == '\n')
+#if defined(CONFIG_SERIAL_MULTI)
+ serial_putc_dev (dev_base, '\r');
+#else
serial_putc ('\r');
+#endif
/* check THRE bit, wait for transmiter available */
for (i = 1; i < 3500; i++) {
+#if defined(CONFIG_SERIAL_MULTI)
+ if ((in8 (dev_base + UART_LSR) & 0x20) == 0x20)
+#else
if ((in8 (ACTING_UART0_BASE + UART_LSR) & 0x20) == 0x20)
+#endif
break;
udelay (100);
}
+#if defined(CONFIG_SERIAL_MULTI)
+ out8 (dev_base + UART_THR, c); /* put character out */
+#else
out8 (ACTING_UART0_BASE + UART_THR, c); /* put character out */
+#endif
}
-
+#if defined(CONFIG_SERIAL_MULTI)
+void serial_puts_dev (unsigned long dev_base, const char *s)
+#else
void serial_puts (const char *s)
+#endif
{
while (*s) {
+#if defined(CONFIG_SERIAL_MULTI)
+ serial_putc_dev (dev_base, *s++);
+#else
serial_putc (*s++);
+#endif
}
}
-
-int serial_getc ()
+#if defined(CONFIG_SERIAL_MULTI)
+int serial_getc_dev (unsigned long dev_base)
+#else
+int serial_getc (void)
+#endif
{
unsigned char status = 0;
@@ -596,7 +680,11 @@
#if defined(CONFIG_HW_WATCHDOG)
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
#endif /* CONFIG_HW_WATCHDOG */
+#if defined(CONFIG_SERIAL_MULTI)
+ status = in8 (dev_base + UART_LSR);
+#else
status = in8 (ACTING_UART0_BASE + UART_LSR);
+#endif
if ((status & asyncLSRDataReady1) != 0x0) {
break;
}
@@ -604,22 +692,37 @@
asyncLSROverrunError1 |
asyncLSRParityError1 |
asyncLSRBreakInterrupt1 )) != 0) {
+#if defined(CONFIG_SERIAL_MULTI)
+ out8 (dev_base + UART_LSR,
+#else
out8 (ACTING_UART0_BASE + UART_LSR,
+#endif
asyncLSRFramingError1 |
asyncLSROverrunError1 |
asyncLSRParityError1 |
asyncLSRBreakInterrupt1);
}
}
+#if defined(CONFIG_SERIAL_MULTI)
+ return (0x000000ff & (int) in8 (dev_base));
+#else
return (0x000000ff & (int) in8 (ACTING_UART0_BASE));
+#endif
}
-
-int serial_tstc ()
+#if defined(CONFIG_SERIAL_MULTI)
+int serial_tstc_dev (unsigned long dev_base)
+#else
+int serial_tstc (void)
+#endif
{
unsigned char status;
+#if defined(CONFIG_SERIAL_MULTI)
+ status = in8 (dev_base + UART_LSR);
+#else
status = in8 (ACTING_UART0_BASE + UART_LSR);
+#endif
if ((status & asyncLSRDataReady1) != 0x0) {
return (1);
}
@@ -627,7 +730,11 @@
asyncLSROverrunError1 |
asyncLSRParityError1 |
asyncLSRBreakInterrupt1 )) != 0) {
+#if defined(CONFIG_SERIAL_MULTI)
+ out8 (dev_base + UART_LSR,
+#else
out8 (ACTING_UART0_BASE + UART_LSR,
+#endif
asyncLSRFramingError1 |
asyncLSROverrunError1 |
asyncLSRParityError1 |
@@ -636,7 +743,6 @@
return 0;
}
-
#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
void serial_isr (void *arg)
@@ -651,8 +757,8 @@
} else {
space = rx_get - rx_put;
}
- while (serial_tstc ()) {
- c = serial_getc ();
+ while (serial_tstc_dev (ACTING_UART0_BASE)) {
+ c = serial_getc_dev (ACTING_UART0_BASE);
if (space) {
buf_info.rx_buffer[rx_put++] = c;
space--;
@@ -752,7 +858,6 @@
#endif /* CONFIG_SERIAL_SOFTWARE_FIFO */
-
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
/*
AS HARNOIS : according to CONFIG_KGDB_SER_INDEX kgdb uses serial port
@@ -788,7 +893,6 @@
out8 (ACTING_UART1_BASE + UART_IER, 0x00); /* set interrupt enable reg */
}
-
void putDebugChar (const char c)
{
if (c == '\n')
@@ -800,7 +904,6 @@
while ((in8 (ACTING_UART1_BASE + UART_LSR) & 0x20) != 0x20);
}
-
void putDebugStr (const char *s)
{
while (*s) {
@@ -808,7 +911,6 @@
}
}
-
int getDebugChar (void)
{
unsigned char status = 0;
@@ -832,7 +934,6 @@
return (0x000000ff & (int) in8 (ACTING_UART1_BASE));
}
-
void kgdb_interruptible (int yes)
{
return;
@@ -867,4 +968,87 @@
#endif /* (CONFIG_KGDB_SER_INDEX & 2) */
#endif /* CFG_CMD_KGDB */
+
+#if defined(CONFIG_SERIAL_MULTI)
+int serial0_init(void)
+{
+ return (serial_init_dev(UART0_BASE));
+}
+
+int serial1_init(void)
+{
+ return (serial_init_dev(UART1_BASE));
+}
+void serial0_setbrg (void)
+{
+ serial_setbrg_dev(UART0_BASE);
+}
+void serial1_setbrg (void)
+{
+ serial_setbrg_dev(UART1_BASE);
+}
+
+void serial0_putc(const char c)
+{
+ serial_putc_dev(UART0_BASE,c);
+}
+
+void serial1_putc(const char c)
+{
+ serial_putc_dev(UART1_BASE, c);
+}
+void serial0_puts(const char *s)
+{
+ serial_puts_dev(UART0_BASE, s);
+}
+
+void serial1_puts(const char *s)
+{
+ serial_puts_dev(UART1_BASE, s);
+}
+
+int serial0_getc(void)
+{
+ return(serial_getc_dev(UART0_BASE));
+}
+
+int serial1_getc(void)
+{
+ return(serial_getc_dev(UART1_BASE));
+}
+int serial0_tstc(void)
+{
+ return (serial_tstc_dev(UART0_BASE));
+}
+
+int serial1_tstc(void)
+{
+ return (serial_tstc_dev(UART1_BASE));
+}
+
+struct serial_device serial0_device =
+{
+ "serial0",
+ "UART0",
+ serial0_init,
+ serial0_setbrg,
+ serial0_getc,
+ serial0_tstc,
+ serial0_putc,
+ serial0_puts,
+};
+
+struct serial_device serial1_device =
+{
+ "serial1",
+ "UART1",
+ serial1_init,
+ serial1_setbrg,
+ serial1_getc,
+ serial1_tstc,
+ serial1_putc,
+ serial1_puts,
+};
+#endif /* CONFIG_SERIAL_MULTI */
+
#endif /* CONFIG_405GP || CONFIG_405CR */