clk: renesas: Split SMSTPCR and RMSTPCR tables
The Gen2 requires setting RMSTPCR before booting, while on Gen3 this
is thus far always zero. Split the tables so the RMSTPCR can be set
too.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c
index 76c6de2..ba3c6da 100644
--- a/drivers/clk/renesas/clk-rcar-gen3.c
+++ b/drivers/clk/renesas/clk-rcar-gen3.c
@@ -500,10 +500,11 @@
/* Stop module clock */
for (i = 0; i < info->mstp_table_size; i++) {
clrsetbits_le32(priv->base + SMSTPCR(i),
- info->mstp_table[i].dis,
- info->mstp_table[i].en);
+ info->mstp_table[i].sdis,
+ info->mstp_table[i].sen);
clrsetbits_le32(priv->base + RMSTPCR(i),
- info->mstp_table[i].dis, 0x0);
+ info->mstp_table[i].rdis,
+ info->mstp_table[i].ren);
}
return 0;
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index c5d22f5..7de4754 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -316,12 +316,18 @@
};
static const struct mstp_stop_table r8a7795_mstp_table[] = {
- { 0x00640800, 0x0 }, { 0xF3EE9390, 0x0 },
- { 0x340FAFDC, 0x2040 }, { 0xD80C7CDF, 0x400 },
- { 0x80000184, 0x180 }, { 0x40BFFF46, 0x0 },
- { 0xE5FBEECF, 0x0 }, { 0x39FFFF0E, 0x0 },
- { 0x01F19FF4, 0x0 }, { 0xFFDFFFFF, 0x0 },
- { 0xFFFEFFE0, 0x0 }, { 0x00000000, 0x0 },
+ { 0x00640800, 0x0, 0x00640800, 0 },
+ { 0xF3EE9390, 0x0, 0xF3EE9390, 0 },
+ { 0x340FAFDC, 0x2040, 0x340FAFDC, 0 },
+ { 0xD80C7CDF, 0x400, 0xD80C7CDF, 0 },
+ { 0x80000184, 0x180, 0x80000184, 0 },
+ { 0x40BFFF46, 0x0, 0x40BFFF46, 0 },
+ { 0xE5FBEECF, 0x0, 0xE5FBEECF, 0 },
+ { 0x39FFFF0E, 0x0, 0x39FFFF0E, 0 },
+ { 0x01F19FF4, 0x0, 0x01F19FF4, 0 },
+ { 0xFFDFFFFF, 0x0, 0xFFDFFFFF, 0 },
+ { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 },
+ { 0x00000000, 0x0, 0x00000000, 0 },
};
static const void *r8a7795_get_pll_config(const u32 cpg_mode)
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 80e07da..fb811e9 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -289,12 +289,18 @@
};
static const struct mstp_stop_table r8a7796_mstp_table[] = {
- { 0x00200000, 0x0 }, { 0xFFFFFFFF, 0x0 },
- { 0x340E2FDC, 0x2040 }, { 0xFFFFFFDF, 0x400 },
- { 0x80000184, 0x180 }, { 0xC3FFFFFF, 0x0 },
- { 0xFFFFFFFF, 0x0 }, { 0xFFFFFFFF, 0x0 },
- { 0x01F1FFF7, 0x0 }, { 0xFFFFFFFE, 0x0 },
- { 0xFFFEFFE0, 0x0 }, { 0x000000B7, 0x0 },
+ { 0x00200000, 0x0, 0x00200000, 0 },
+ { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 },
+ { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 },
+ { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 },
+ { 0x80000184, 0x180, 0x80000184, 0 },
+ { 0xC3FFFFFF, 0x0, 0xC3FFFFFF, 0 },
+ { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 },
+ { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 },
+ { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 },
+ { 0xFFFFFFFE, 0x0, 0xFFFFFFFE, 0 },
+ { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 },
+ { 0x000000B7, 0x0, 0x000000B7, 0 },
};
static const void *r8a7796_get_pll_config(const u32 cpg_mode)
diff --git a/drivers/clk/renesas/r8a77970-cpg-mssr.c b/drivers/clk/renesas/r8a77970-cpg-mssr.c
index 5a031cb..ee90f95 100644
--- a/drivers/clk/renesas/r8a77970-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77970-cpg-mssr.c
@@ -180,12 +180,18 @@
};
static const struct mstp_stop_table r8a77970_mstp_table[] = {
- { 0x00230000, 0x0 }, { 0xFFFFFFFF, 0x0 },
- { 0x14062FD8, 0x2040 }, { 0xFFFFFFDF, 0x400 },
- { 0x80000184, 0x180 }, { 0x83FFFFFF, 0x0 },
- { 0xFFFFFFFF, 0x0 }, { 0xFFFFFFFF, 0x0 },
- { 0x7FF3FFF4, 0x0 }, { 0xFBF7FF97, 0x0 },
- { 0xFFFEFFE0, 0x0 }, { 0x000000B7, 0x0 },
+ { 0x00230000, 0x0, 0x00230000, 0 },
+ { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 },
+ { 0x14062FD8, 0x2040, 0x14062FD8, 0 },
+ { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 },
+ { 0x80000184, 0x180, 0x80000184, 0 },
+ { 0x83FFFFFF, 0x0, 0x83FFFFFF, 0 },
+ { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 },
+ { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 },
+ { 0x7FF3FFF4, 0x0, 0x7FF3FFF4, 0 },
+ { 0xFBF7FF97, 0x0, 0xFBF7FF97, 0 },
+ { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 },
+ { 0x000000B7, 0x0, 0x000000B7, 0 },
};
static const void *r8a77970_get_pll_config(const u32 cpg_mode)
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c
index f4b0699..859104b 100644
--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c
@@ -182,19 +182,25 @@
*/
#define CPG_PLL_CONFIG_INDEX(md) (((md) & BIT(19)) >> 19)
-static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[2] __initconst = {
+static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[2] = {
/* EXTAL div PLL1 mult/div PLL3 mult/div */
{ 1, 100, 3, 100, 3, },
{ 1, 100, 3, 116, 6, },
};
static const struct mstp_stop_table r8a77995_mstp_table[] = {
- { 0x00200000, 0x0 }, { 0xFFFFFFFF, 0x0 },
- { 0x340E2FDC, 0x2040 }, { 0xFFFFFFDF, 0x400 },
- { 0x80000184, 0x180 }, { 0xC3FFFFFF, 0x0 },
- { 0xFFFFFFFF, 0x0 }, { 0xFFFFFFFF, 0x0 },
- { 0x01F1FFF7, 0x0 }, { 0xFFFFFFFE, 0x0 },
- { 0xFFFEFFE0, 0x0 }, { 0x000000B7, 0x0 },
+ { 0x00200000, 0x0, 0x00200000, 0 },
+ { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 },
+ { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 },
+ { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 },
+ { 0x80000184, 0x180, 0x80000184, 0 },
+ { 0xC3FFFFFF, 0x0, 0xC3FFFFFF, 0 },
+ { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 },
+ { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 },
+ { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 },
+ { 0xFFFFFFFE, 0x0, 0xFFFFFFFE, 0 },
+ { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 },
+ { 0x000000B7, 0x0, 0x000000B7, 0 },
};
static const void *r8a77995_get_pll_config(const u32 cpg_mode)
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
index c0c6ae2..a169345 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.h
+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
@@ -86,8 +86,10 @@
{ .name = _name, .id = MOD_CLK_ID(_mod), .parent = _parent }
struct mstp_stop_table {
- u32 dis;
- u32 en;
+ u32 sdis;
+ u32 sen;
+ u32 rdis;
+ u32 ren;
};
#define TSTR0 0x04