85xx: Set HID1[mbdd] on e500v2 rev5.0 or greater
The HID1[MBDD] bit is new on rev5.0 or greater cores and will optimize
the performance of mbar/eieio instructions.
Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S
index 69fce92..0b5b9da 100644
--- a/cpu/mpc85xx/release.S
+++ b/cpu/mpc85xx/release.S
@@ -57,6 +57,13 @@
#ifndef CONFIG_E500MC
li r3,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
+ mfspr r0,PVR
+ andi. r0,r0,0xff
+ cmpwi r0,0x50@l /* if we are rev 5.0 or greater set MBDD */
+ blt 1f
+ /* Set MBDD bit also */
+ ori r3, r3, HID1_MBDD@l
+1:
mtspr SPRN_HID1,r3
#endif