Cleaned up some 85xx PCI bugs

* Cleaned up the CDS PCI Config Tables and added NULL entries to
  the end
* Fixed PCIe LAWBAR assignemt to use the cpu-relative address
* Fixed 85xx PCI code to assign powar region sizes based on the
  config values (rather than hard-coding them)
* Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address

Signed-off-by: Andy Fleming <afleming@freescale.com>
diff --git a/board/cds/mpc8548cds/init.S b/board/cds/mpc8548cds/init.S
index 34ca711..d468f5b 100644
--- a/board/cds/mpc8548cds/init.S
+++ b/board/cds/mpc8548cds/init.S
@@ -248,7 +248,7 @@
 #define LAWBAR6 ((CFG_PEX_MEM_BASE>>12) & 0xfffff)
 #define LAWAR6 	(LAWAR_EN | LAWAR_TRGT_IF_PEX | (LAWAR_SIZE & LAWAR_SIZE_512M))
 
-#define LAWBAR7 ((CFG_PEX_IO_BASE>>12) & 0xfffff)
+#define LAWBAR7 ((CFG_PEX_IO_PHYS>>12) & 0xfffff)
 #define LAWAR7 	(LAWAR_EN | LAWAR_TRGT_IF_PEX | (LAWAR_SIZE & LAWAR_SIZE_16M))
 
 #define LAWBAR8 ((CFG_RIO_MEM_BASE>>12) & 0xfffff)