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Niklaus Giger137fdd92007-07-27 11:28:03 +02001/*
2 * (C) Copyright 2007 Netstal Maschinen AG
3 * Niklaus Giger (Niklaus.Giger@netstal.com)
4 *
5 * (C) Copyright 2006-2007
6 * Stefan Roese, DENX Software Engineering, sr@denx.de.
7 *
8 * (C) Copyright 2006
9 * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
10 * Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28/************************************************************************
29 * hcu5.h - configuration for HCU5 board (derived from sequoia.h)
30 ***********************************************************************/
31
32#ifndef __CONFIG_H
33#define __CONFIG_H
34
35/*-----------------------------------------------------------------------
36 * High Level Configuration Options
37 *----------------------------------------------------------------------*/
38#define CONFIG_HCU5 1 /* Board is HCU5 */
39#define CONFIG_440EPX 1 /* Specific PPC440EPx */
40#define CONFIG_440 1 /* ... PPC440 family */
41#define CONFIG_4xx 1 /* ... PPC4xx family */
42#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
43
44#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
45#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
Niklaus Giger137fdd92007-07-27 11:28:03 +020046
47/*-----------------------------------------------------------------------
48 * Base addresses -- Note these are effective addresses where the
49 * actual resources get mapped (not physical addresses)
50 *----------------------------------------------------------------------*/
Niklaus Giger43710902008-01-16 18:39:08 +010051#define CFG_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */
52#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
Niklaus Giger137fdd92007-07-27 11:28:03 +020053
Niklaus Giger43710902008-01-16 18:39:08 +010054#define CFG_TLB_FOR_BOOT_FLASH 3
Niklaus Giger137fdd92007-07-27 11:28:03 +020055#define CFG_BOOT_BASE_ADDR 0xfff00000
56#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
57#define CFG_FLASH_BASE 0xfff80000 /* start of FLASH */
58#define CFG_MONITOR_BASE TEXT_BASE
59#define CFG_OCM_BASE 0xe0010000 /* ocm */
Niklaus Giger43710902008-01-16 18:39:08 +010060#define CFG_OCM_DATA_ADDR CFG_OCM_BASE
Niklaus Giger137fdd92007-07-27 11:28:03 +020061#define CFG_PCI_BASE 0xe0000000 /* Internal PCI regs */
62#define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
63#define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
64#define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
65#define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
66
67/* Don't change either of these */
68#define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals */
69
70#define CFG_USB2D0_BASE 0xe0000100
71#define CFG_USB_DEVICE 0xe0000000
72#define CFG_USB_HOST 0xe0000400
73
74/*-----------------------------------------------------------------------
75 * Initial RAM & stack pointer
76 *----------------------------------------------------------------------*/
77/* 440EPx/440GRx have 16KB of internal SRAM, so no need for D-Cache */
Niklaus Giger137fdd92007-07-27 11:28:03 +020078#define CFG_INIT_RAM_ADDR CFG_OCM_BASE /* OCM */
79
80#define CFG_INIT_RAM_END (4 << 10)
81#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
82#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
Niklaus Giger43710902008-01-16 18:39:08 +010083#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR
Niklaus Giger137fdd92007-07-27 11:28:03 +020084
85/*-----------------------------------------------------------------------
86 * Serial Port
87 *----------------------------------------------------------------------*/
88#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
89#define CONFIG_BAUDRATE 9600
Niklaus Giger43710902008-01-16 18:39:08 +010090#define CONFIG_SERIAL_MULTI 1
91/* needed to be able to define
Niklaus Giger137fdd92007-07-27 11:28:03 +020092 CONFIG_SERIAL_SOFTWARE_FIFO, but
93 CONFIG_SERIAL_SOFTWARE_FIFO (16) does not work */
94/* Size (bytes) of interrupt driven serial port buffer.
95 * Set to 0 to use polling instead of interrupts.
96 * Setting to 0 will also disable RTS/CTS handshaking.
97 */
98#undef CONFIG_SERIAL_SOFTWARE_FIFO
99#undef CONFIG_UART1_CONSOLE
100
Niklaus Giger43710902008-01-16 18:39:08 +0100101#undef CONFIG_CMD_HWFLOW
Niklaus Giger137fdd92007-07-27 11:28:03 +0200102#define CFG_BAUDRATE_TABLE \
103 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
104
105/*-----------------------------------------------------------------------
106 * Environment
107 *----------------------------------------------------------------------*/
108
109#undef CFG_ENV_IS_IN_NVRAM
Niklaus Giger43710902008-01-16 18:39:08 +0100110#define CFG_ENV_IS_IN_FLASH
111#undef CFG_ENV_IS_IN_EEPROM
Niklaus Giger137fdd92007-07-27 11:28:03 +0200112#undef CFG_ENV_IS_NOWHERE
113
114#ifdef CFG_ENV_IS_IN_EEPROM
115/* Put the environment after the SDRAM and bootstrap configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200116#define PROM_SIZE 2048
Niklaus Giger137fdd92007-07-27 11:28:03 +0200117#define CFG_BOOSTRAP_OPTION_OFFSET 512
118#define CFG_ENV_OFFSET (CFG_BOOSTRAP_OPTION_OFFSET + 0x10)
119#define CFG_ENV_SIZE (PROM_SIZE-CFG_ENV_OFFSET)
120#endif
121
122#ifdef CFG_ENV_IS_IN_FLASH
123/* Put the environment in Flash */
Niklaus Giger43710902008-01-16 18:39:08 +0100124#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200125#define CFG_ENV_ADDR ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE)
Niklaus Gigeref5b4f22008-02-05 10:26:44 +0100126#define CFG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200127
128/* Address and size of Redundant Environment Sector */
129#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
130#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
Niklaus Giger43710902008-01-16 18:39:08 +0100131
Niklaus Giger137fdd92007-07-27 11:28:03 +0200132#endif
133
134/*-----------------------------------------------------------------------
135 * DDR SDRAM
136 *----------------------------------------------------------------------*/
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200137#define CFG_MBYTES_SDRAM (128) /* 128 MB or 256 MB */
Niklaus Giger43710902008-01-16 18:39:08 +0100138#define CFG_DDR_CACHED_ADDR 0x50000000 /* setup 2nd TLB cached here */
139#undef CONFIG_DDR_DATA_EYE /* Do not use DDR2 optimization */
140#define CONFIG_DDR_ECC 1 /* enable ECC */
141
142/* Following two definitions must be kept in sync with config.h of vxWorks */
143#define USER_RESERVED_MEM ( 0) /* in kB */
144#define PM_RESERVED_MEM ( 64) /* in kB: pmLib reserved area size */
145#define CONFIG_PRAM ( USER_RESERVED_MEM + PM_RESERVED_MEM )
Niklaus Giger137fdd92007-07-27 11:28:03 +0200146
147/*-----------------------------------------------------------------------
148 * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
149 * the second internal I2C controller of the PPC440EPx
150 *----------------------------------------------------------------------*/
Niklaus Gigeref5b4f22008-02-05 10:26:44 +0100151#define CFG_SPD_BUS_NUM 1
Niklaus Giger137fdd92007-07-27 11:28:03 +0200152
Niklaus Gigeref5b4f22008-02-05 10:26:44 +0100153#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200154#undef CONFIG_SOFT_I2C /* I2C bit-banged */
155#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
156#define CFG_I2C_SLAVE 0x7F
157
158/* This is the 7bit address of the device, not including P. */
159#define CFG_I2C_EEPROM_ADDR 0x50
160#define CFG_I2C_EEPROM_ADDR_LEN 1
161
162/* The EEPROM can do 16byte ( 1 << 4 ) page writes. */
163#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07
164#define CFG_EEPROM_PAGE_WRITE_BITS 4
165#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
166#define CFG_EEPROM_PAGE_WRITE_ENABLE
167#undef CFG_I2C_MULTI_EEPROMS
168
169
170#define CONFIG_PREBOOT "echo;" \
171 "echo Type \"run nfs\" to mount Linux root filesystem over NFS;"\
172 "echo"
173
174#undef CONFIG_BOOTARGS
175
176/* Setup some board specific values for the default environment variables */
177#define CONFIG_HOSTNAME hcu5
Niklaus Giger43710902008-01-16 18:39:08 +0100178#define CONFIG_IPADDR 172.25.1.99
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200179#define CONFIG_ETHADDR 00:60:13:00:00:00 /* Netstal Machines AG MAC */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200180#define CONFIG_OVERWRITE_ETHADDR_ONCE
181#define CONFIG_SERVERIP 172.25.1.3
182
183#define CFG_TFTP_LOADADDR 0x01000000 /* @16 MB */
184
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200185#define CONFIG_EXTRA_ENV_SETTINGS \
Niklaus Giger137fdd92007-07-27 11:28:03 +0200186 "netdev=eth0\0" \
187 "loadaddr=0x01000000\0" \
188 "nfsargs=setenv bootargs root=/dev/nfs rw " \
189 "nfsroot=${serverip}:${rootpath}\0" \
190 "ramargs=setenv bootargs root=/dev/ram rw\0" \
191 "addip=setenv bootargs ${bootargs} " \
192 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
193 ":${hostname}:${netdev}:off panic=1\0" \
194 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200195 "nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
Niklaus Giger137fdd92007-07-27 11:28:03 +0200196 "bootm\0" \
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200197 "bootfile=hcu5/uImage\0" \
198 "rootpath=/home/hcu/eldk/ppc_4xxFP\0" \
199 "load=tftp 100000 hcu5/u-boot.bin\0" \
Niklaus Gigeref5b4f22008-02-05 10:26:44 +0100200 "update=protect off FFFB0000 FFFFFFFF;era FFFB0000 FFFFFFFF;" \
201 "cp.b 100000 FFFB0000 50000\0" \
Detlev Zundeld8ab58b2008-03-06 16:45:53 +0100202 "upd=run load update\0" \
Niklaus Gigeref5b4f22008-02-05 10:26:44 +0100203 "vx_rom=hcu5/hcu5_vx_rom\0" \
204 "vx=tftp ${loadaddr} ${vx_rom};run vxargs; bootvx\0" \
205 "vxargs=setenv bootargs emac(0,0)c:${vx_rom} e=${ipaddr}" \
206 " h=${serverip} u=dpu pw=netstal8752 tn=hcu5 f=0x3008\0" \
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200207 "usbargs=setenv bootargs root=/dev/sda1 ro\0" \
Niklaus Giger43710902008-01-16 18:39:08 +0100208 "linux=usb start; ext2load usb 0 ${loadaddr} /boot/uImage;" \
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200209 "run usbargs addip addtty; bootm\0" \
Niklaus Giger43710902008-01-16 18:39:08 +0100210 "net_nfs_fdt=tftp 200000 ${bootfile};" \
211 "tftp ${fdt_addr} ${fdt_file};" \
212 "run nfsargs addip addtty;" \
213 "bootm 200000 - ${fdt_addr}\0" \
214 "fdt_file=hcu5/hcu5.dtb\0" \
215 "fdt_addr=400000\0" \
Niklaus Giger137fdd92007-07-27 11:28:03 +0200216 ""
217#define CONFIG_BOOTCOMMAND "run vx"
218
Niklaus Giger137fdd92007-07-27 11:28:03 +0200219#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200220
221#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
222#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
223
224#define CONFIG_M88E1111_PHY 1
225#define CONFIG_IBM_EMAC4_V4 1
226#define CONFIG_MII 1 /* MII PHY management */
Niklaus Gigeref5b4f22008-02-05 10:26:44 +0100227#define CONFIG_PHY_ADDR 1 /* PHY address, like on HCU4 */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200228
Niklaus Gigeref5b4f22008-02-05 10:26:44 +0100229#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200230
231#define CONFIG_HAS_ETH0
Niklaus Giger43710902008-01-16 18:39:08 +0100232#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & desc. */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200233
234#define CONFIG_NET_MULTI 1
Niklaus Gigeref5b4f22008-02-05 10:26:44 +0100235#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
236#define CONFIG_PHY1_ADDR 2
Niklaus Giger137fdd92007-07-27 11:28:03 +0200237
238/* USB */
239#define CONFIG_USB_OHCI
240#define CONFIG_USB_STORAGE
241
242/* Comment this out to enable USB 1.1 device */
243#define USB_2_0_DEVICE
244
Niklaus Giger137fdd92007-07-27 11:28:03 +0200245/* Partitions */
246#define CONFIG_MAC_PARTITION
247#define CONFIG_DOS_PARTITION
248#define CONFIG_ISO_PARTITION
249
Stefan Roese3b3bff42007-08-14 16:36:29 +0200250/*
251 * BOOTP options
252 */
253#define CONFIG_BOOTP_BOOTFILESIZE
254#define CONFIG_BOOTP_BOOTPATH
255#define CONFIG_BOOTP_GATEWAY
256#define CONFIG_BOOTP_HOSTNAME
257
258/*
259 * Command line configuration.
260 */
261#include <config_cmd_default.h>
262
263#define CONFIG_CMD_ASKENV
Stefan Roese3b3bff42007-08-14 16:36:29 +0200264#define CONFIG_CMD_DHCP
265#define CONFIG_CMD_DIAG
266#define CONFIG_CMD_EEPROM
267#define CONFIG_CMD_ELF
268#define CONFIG_CMD_FLASH
269#define CONFIG_CMD_FAT
270#define CONFIG_CMD_I2C
271#define CONFIG_CMD_IMMAP
272#define CONFIG_CMD_IRQ
273#define CONFIG_CMD_MII
274#define CONFIG_CMD_NET
275#define CONFIG_CMD_NFS
276#define CONFIG_CMD_PING
277#define CONFIG_CMD_REGINFO
278#define CONFIG_CMD_SDRAM
279#define CONFIG_CMD_USB
Niklaus Giger137fdd92007-07-27 11:28:03 +0200280
Niklaus Giger43710902008-01-16 18:39:08 +0100281/* POST support */
282#define CONFIG_POST (CFG_POST_MEMORY | \
283 CFG_POST_CPU | \
284 CFG_POST_UART | \
285 CFG_POST_I2C | \
286 CFG_POST_CACHE | \
287 CFG_POST_FPU | \
288 CFG_POST_ETHER | \
289 CFG_POST_SPR)
290#define CFG_POST_UART_TABLE {UART0_BASE}
291
292#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4)
293#define CFG_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */
294#define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
295
Niklaus Giger137fdd92007-07-27 11:28:03 +0200296#define CONFIG_SUPPORT_VFAT
297
Niklaus Giger137fdd92007-07-27 11:28:03 +0200298/*-----------------------------------------------------------------------
299 * Miscellaneous configurable options
300 *----------------------------------------------------------------------*/
301#define CFG_LONGHELP /* undef to save memory */
302#define CFG_PROMPT "=> " /* Monitor Command Prompt */
Stefan Roese3b3bff42007-08-14 16:36:29 +0200303#if defined(CONFIG_CMD_KGDB)
Niklaus Giger137fdd92007-07-27 11:28:03 +0200304#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
305#else
306#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
307#endif
Niklaus Giger43710902008-01-16 18:39:08 +0100308#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
Niklaus Giger137fdd92007-07-27 11:28:03 +0200309#define CFG_MAXARGS 16 /* max number of command args */
310#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
311
312#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
Niklaus Gigeref5b4f22008-02-05 10:26:44 +0100313#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200314
315#define CFG_LOAD_ADDR 0x100000 /* default load address */
316#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
317
318#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
319
320#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
321#define CONFIG_LOOPW 1 /* enable loopw command */
322#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200323#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
324
325/*-----------------------------------------------------------------------
326 * PCI stuff
327 *----------------------------------------------------------------------*/
328/* General PCI */
Niklaus Giger43710902008-01-16 18:39:08 +0100329#define CONFIG_PCI 1 /* include pci support */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200330#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
Niklaus Giger43710902008-01-16 18:39:08 +0100331#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
332#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr map to CFG_PCI_MEMBASE*/
Niklaus Giger137fdd92007-07-27 11:28:03 +0200333
334/* Board-specific PCI */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200335#define CFG_PCI_TARGET_INIT
336#define CFG_PCI_MASTER_INIT
337
338#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
339#define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
340
341/*
342 * For booting Linux, the board info and command line data
343 * have to be in the first 8 MB of memory, since this is
344 * the maximum mapped by the Linux kernel during initialization.
345 */
Niklaus Giger43710902008-01-16 18:39:08 +0100346#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
347
348/*-----------------------------------------------------------------------
349 * Flash
350 *----------------------------------------------------------------------*/
351
Niklaus Gigera0794942008-02-25 18:37:01 +0100352/* Use common CFI driver */
353#define CFG_FLASH_CFI
354#define CFG_FLASH_CFI_DRIVER
355/* board provides its own flash_init code */
356#define CONFIG_FLASH_CFI_LEGACY 1
357#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
358#define CFG_FLASH_LEGACY_512Kx8 1
359
360/* print 'E' for empty sector on flinfo */
361#define CFG_FLASH_EMPTY_INFO
362
Niklaus Gigeref5b4f22008-02-05 10:26:44 +0100363#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
364#define CFG_MAX_FLASH_SECT 8 /* max number of sectors on one chip */
Niklaus Giger43710902008-01-16 18:39:08 +0100365
Niklaus Giger137fdd92007-07-27 11:28:03 +0200366/*-----------------------------------------------------------------------
367 * External Bus Controller (EBC) Setup
368 *----------------------------------------------------------------------*/
369#define CFG_FLASH CFG_FLASH_BASE
370#define CFG_CS_1 0xC8000000 /* CAN */
371#define CFG_CS_2 0xCC000000 /* CPLD and IMC-Bus Standard */
372#define CFG_CPLD CFG_CS_2
Niklaus Giger43710902008-01-16 18:39:08 +0100373#define CFG_CS_3 0xCE000000 /* CPLD and IMC-Bus Fast */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200374
Niklaus Giger43710902008-01-16 18:39:08 +0100375#define CFG_BOOTFLASH_CS 0 /* Boot Flash chip connected to CSx */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200376#define CFG_EBC_PB0AP 0x02005400
377#define CFG_EBC_PB0CR 0xFFF18000 /* (CFG_FLASH | 0xda000) */
378#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200379
Niklaus Giger43710902008-01-16 18:39:08 +0100380/* Memory Bank 1 CAN-Chips initialization */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200381#define CFG_EBC_PB1AP 0x02054500
382#define CFG_EBC_PB1CR 0xC8018000
383
Niklaus Giger43710902008-01-16 18:39:08 +0100384/* Memory Bank 2 CPLD/IMC-Bus standard initialization */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200385#define CFG_EBC_PB2AP 0x01840300
386#define CFG_EBC_PB2CR 0xCC0BA000
387
Niklaus Giger43710902008-01-16 18:39:08 +0100388/* Memory Bank 3 IMC-Bus fast mode initialization */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200389#define CFG_EBC_PB3AP 0x01800300
390#define CFG_EBC_PB3CR 0xCE0BA000
391
Niklaus Giger43710902008-01-16 18:39:08 +0100392/* Memory Bank 4 (not used) initialization */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200393#undef CFG_EBC_PB4AP
394#undef CFG_EBC_PB4CR
395
Niklaus Giger43710902008-01-16 18:39:08 +0100396/* Memory Bank 5 (not used) initialization */
Niklaus Giger137fdd92007-07-27 11:28:03 +0200397#undef CFG_EBC_PB5AP
398#undef CFG_EBC_PB5CR
399
400#define HCU_CPLD_VERSION_REGISTER ( CFG_CPLD + 0x0F00000 )
401#define HCU_HW_VERSION_REGISTER ( CFG_CPLD + 0x1400000 )
402
Niklaus Giger137fdd92007-07-27 11:28:03 +0200403#define CFG_HUSH_PARSER /* use "hush" command parser */
404#ifdef CFG_HUSH_PARSER
405 #define CFG_PROMPT_HUSH_PS2 "> "
406#endif
407
Stefan Roese3b3bff42007-08-14 16:36:29 +0200408#if defined(CONFIG_CMD_KGDB)
Niklaus Giger137fdd92007-07-27 11:28:03 +0200409#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
410#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
411#endif
Niklaus Giger43710902008-01-16 18:39:08 +0100412
413/* pass open firmware flat tree */
414#define CONFIG_OF_LIBFDT 1
415#define CONFIG_OF_BOARD_SETUP 1
416
Niklaus Giger137fdd92007-07-27 11:28:03 +0200417#endif /* __CONFIG_H */