blob: 7171bdd51b421441f401df6b70cb1b56bfdea3f1 [file] [log] [blame]
Wolfgang Denk932394a2005-08-17 12:55:25 +02001/*
2 * drivers/mtd/nand.c
3 *
4 * Overview:
5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02008 *
Wolfgang Denk932394a2005-08-17 12:55:25 +02009 * Additional technical information is available on
Scott Woodc45912d2008-10-24 16:20:43 -050010 * http://www.linux-mtd.infradead.org/doc/nand.html
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +020011 *
Wolfgang Denk932394a2005-08-17 12:55:25 +020012 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
William Juulcfa460a2007-10-31 13:53:06 +010013 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
Wolfgang Denk932394a2005-08-17 12:55:25 +020014 *
William Juulcfa460a2007-10-31 13:53:06 +010015 * Credits:
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +020016 * David Woodhouse for adding multichip support
17 *
Wolfgang Denk932394a2005-08-17 12:55:25 +020018 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
20 *
William Juulcfa460a2007-10-31 13:53:06 +010021 * TODO:
Wolfgang Denk932394a2005-08-17 12:55:25 +020022 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
Scott Woodc45912d2008-10-24 16:20:43 -050027 * BBT table is not serialized, has to be fixed
Wolfgang Denk932394a2005-08-17 12:55:25 +020028 *
Wolfgang Denk932394a2005-08-17 12:55:25 +020029 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License version 2 as
31 * published by the Free Software Foundation.
32 *
33 */
34
35/* XXX U-BOOT XXX */
36#if 0
William Juulcfa460a2007-10-31 13:53:06 +010037#include <linux/module.h>
Wolfgang Denk932394a2005-08-17 12:55:25 +020038#include <linux/delay.h>
39#include <linux/errno.h>
William Juulcfa460a2007-10-31 13:53:06 +010040#include <linux/err.h>
Wolfgang Denk932394a2005-08-17 12:55:25 +020041#include <linux/sched.h>
42#include <linux/slab.h>
43#include <linux/types.h>
44#include <linux/mtd/mtd.h>
45#include <linux/mtd/nand.h>
46#include <linux/mtd/nand_ecc.h>
47#include <linux/mtd/compatmac.h>
48#include <linux/interrupt.h>
49#include <linux/bitops.h>
William Juulcfa460a2007-10-31 13:53:06 +010050#include <linux/leds.h>
Wolfgang Denk932394a2005-08-17 12:55:25 +020051#include <asm/io.h>
52
53#ifdef CONFIG_MTD_PARTITIONS
54#include <linux/mtd/partitions.h>
55#endif
56
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +020057#endif
Wolfgang Denk932394a2005-08-17 12:55:25 +020058
59#include <common.h>
Bartlomiej Siekaaddb2e12006-03-05 18:57:33 +010060
William Juulcfa460a2007-10-31 13:53:06 +010061#define ENOTSUPP 524 /* Operation is not supported */
62
Wolfgang Denk932394a2005-08-17 12:55:25 +020063#include <malloc.h>
64#include <watchdog.h>
William Juulcfa460a2007-10-31 13:53:06 +010065#include <linux/err.h>
Wolfgang Denk932394a2005-08-17 12:55:25 +020066#include <linux/mtd/compat.h>
67#include <linux/mtd/mtd.h>
68#include <linux/mtd/nand.h>
69#include <linux/mtd/nand_ecc.h>
70
Stefan Roese10bb62d2009-04-24 15:58:33 +020071#ifdef CONFIG_MTD_PARTITIONS
72#include <linux/mtd/partitions.h>
73#endif
74
Wolfgang Denk932394a2005-08-17 12:55:25 +020075#include <asm/io.h>
76#include <asm/errno.h>
77
78#ifdef CONFIG_JFFS2_NAND
79#include <jffs2/jffs2.h>
80#endif
81
Peter Tyser8da60122009-02-04 13:47:22 -060082/*
83 * CONFIG_SYS_NAND_RESET_CNT is used as a timeout mechanism when resetting
84 * a flash. NAND flash is initialized prior to interrupts so standard timers
85 * can't be used. CONFIG_SYS_NAND_RESET_CNT should be set to a value
86 * which is greater than (max NAND reset time / NAND status read time).
87 * A conservative default of 200000 (500 us / 25 ns) is used as a default.
88 */
89#ifndef CONFIG_SYS_NAND_RESET_CNT
90#define CONFIG_SYS_NAND_RESET_CNT 200000
91#endif
92
Wolfgang Denk932394a2005-08-17 12:55:25 +020093/* Define default oob placement schemes for large and small page devices */
William Juulcfa460a2007-10-31 13:53:06 +010094static struct nand_ecclayout nand_oob_8 = {
Wolfgang Denk932394a2005-08-17 12:55:25 +020095 .eccbytes = 3,
96 .eccpos = {0, 1, 2},
William Juulcfa460a2007-10-31 13:53:06 +010097 .oobfree = {
98 {.offset = 3,
99 .length = 2},
100 {.offset = 6,
101 .length = 2}}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200102};
103
William Juulcfa460a2007-10-31 13:53:06 +0100104static struct nand_ecclayout nand_oob_16 = {
Wolfgang Denk932394a2005-08-17 12:55:25 +0200105 .eccbytes = 6,
106 .eccpos = {0, 1, 2, 3, 6, 7},
William Juulcfa460a2007-10-31 13:53:06 +0100107 .oobfree = {
108 {.offset = 8,
109 . length = 8}}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200110};
111
William Juulcfa460a2007-10-31 13:53:06 +0100112static struct nand_ecclayout nand_oob_64 = {
Wolfgang Denk932394a2005-08-17 12:55:25 +0200113 .eccbytes = 24,
114 .eccpos = {
William Juulcfa460a2007-10-31 13:53:06 +0100115 40, 41, 42, 43, 44, 45, 46, 47,
116 48, 49, 50, 51, 52, 53, 54, 55,
117 56, 57, 58, 59, 60, 61, 62, 63},
118 .oobfree = {
119 {.offset = 2,
120 .length = 38}}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200121};
122
William Juulcfa460a2007-10-31 13:53:06 +0100123static struct nand_ecclayout nand_oob_128 = {
Sergei Poselenov248ae5c2008-06-06 15:42:43 +0200124 .eccbytes = 48,
125 .eccpos = {
William Juulcfa460a2007-10-31 13:53:06 +0100126 80, 81, 82, 83, 84, 85, 86, 87,
127 88, 89, 90, 91, 92, 93, 94, 95,
128 96, 97, 98, 99, 100, 101, 102, 103,
129 104, 105, 106, 107, 108, 109, 110, 111,
130 112, 113, 114, 115, 116, 117, 118, 119,
131 120, 121, 122, 123, 124, 125, 126, 127},
132 .oobfree = {
133 {.offset = 2,
134 .length = 78}}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200135};
136
William Juulcfa460a2007-10-31 13:53:06 +0100137
138static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd,
139 int new_state);
140
141static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
142 struct mtd_oob_ops *ops);
143
144static int nand_wait(struct mtd_info *mtd, struct nand_chip *this);
Sergei Poselenov248ae5c2008-06-06 15:42:43 +0200145
Wolfgang Denk932394a2005-08-17 12:55:25 +0200146/*
Scott Woodc45912d2008-10-24 16:20:43 -0500147 * For devices which display every fart in the system on a separate LED. Is
William Juulcfa460a2007-10-31 13:53:06 +0100148 * compiled away when LED support is disabled.
Wolfgang Denk932394a2005-08-17 12:55:25 +0200149 */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200150/* XXX U-BOOT XXX */
151#if 0
William Juulcfa460a2007-10-31 13:53:06 +0100152DEFINE_LED_TRIGGER(nand_led_trigger);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200153#endif
Wolfgang Denk932394a2005-08-17 12:55:25 +0200154
155/**
156 * nand_release_device - [GENERIC] release chip
157 * @mtd: MTD device structure
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200158 *
159 * Deselect, release chip lock and wake up anyone waiting on the device
Wolfgang Denk932394a2005-08-17 12:55:25 +0200160 */
161/* XXX U-BOOT XXX */
162#if 0
William Juulcfa460a2007-10-31 13:53:06 +0100163static void nand_release_device(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200164{
William Juulcfa460a2007-10-31 13:53:06 +0100165 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200166
167 /* De-select the NAND device */
William Juulcfa460a2007-10-31 13:53:06 +0100168 chip->select_chip(mtd, -1);
169
170 /* Release the controller and the chip */
171 spin_lock(&chip->controller->lock);
172 chip->controller->active = NULL;
173 chip->state = FL_READY;
174 wake_up(&chip->controller->wq);
175 spin_unlock(&chip->controller->lock);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200176}
177#else
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100178static void nand_release_device (struct mtd_info *mtd)
179{
180 struct nand_chip *this = mtd->priv;
181 this->select_chip(mtd, -1); /* De-select the NAND device */
182}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200183#endif
184
185/**
186 * nand_read_byte - [DEFAULT] read one byte from the chip
187 * @mtd: MTD device structure
188 *
189 * Default read function for 8bit buswith
190 */
William Juulcfa460a2007-10-31 13:53:06 +0100191static uint8_t nand_read_byte(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200192{
William Juulcfa460a2007-10-31 13:53:06 +0100193 struct nand_chip *chip = mtd->priv;
194 return readb(chip->IO_ADDR_R);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200195}
196
197/**
198 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
199 * @mtd: MTD device structure
200 *
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200201 * Default read function for 16bit buswith with
Wolfgang Denk932394a2005-08-17 12:55:25 +0200202 * endianess conversion
203 */
William Juulcfa460a2007-10-31 13:53:06 +0100204static uint8_t nand_read_byte16(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200205{
William Juulcfa460a2007-10-31 13:53:06 +0100206 struct nand_chip *chip = mtd->priv;
207 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
Wolfgang Denk932394a2005-08-17 12:55:25 +0200208}
209
210/**
211 * nand_read_word - [DEFAULT] read one word from the chip
212 * @mtd: MTD device structure
213 *
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200214 * Default read function for 16bit buswith without
Wolfgang Denk932394a2005-08-17 12:55:25 +0200215 * endianess conversion
216 */
217static u16 nand_read_word(struct mtd_info *mtd)
218{
William Juulcfa460a2007-10-31 13:53:06 +0100219 struct nand_chip *chip = mtd->priv;
220 return readw(chip->IO_ADDR_R);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200221}
222
223/**
224 * nand_select_chip - [DEFAULT] control CE line
225 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +0100226 * @chipnr: chipnumber to select, -1 for deselect
Wolfgang Denk932394a2005-08-17 12:55:25 +0200227 *
228 * Default select function for 1 chip devices.
229 */
William Juulcfa460a2007-10-31 13:53:06 +0100230static void nand_select_chip(struct mtd_info *mtd, int chipnr)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200231{
William Juulcfa460a2007-10-31 13:53:06 +0100232 struct nand_chip *chip = mtd->priv;
233
234 switch (chipnr) {
Wolfgang Denk932394a2005-08-17 12:55:25 +0200235 case -1:
William Juulcfa460a2007-10-31 13:53:06 +0100236 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200237 break;
238 case 0:
Wolfgang Denk932394a2005-08-17 12:55:25 +0200239 break;
240
241 default:
242 BUG();
243 }
244}
245
246/**
247 * nand_write_buf - [DEFAULT] write buffer to chip
248 * @mtd: MTD device structure
249 * @buf: data buffer
250 * @len: number of bytes to write
251 *
252 * Default write function for 8bit buswith
253 */
William Juulcfa460a2007-10-31 13:53:06 +0100254static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200255{
256 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100257 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200258
William Juulcfa460a2007-10-31 13:53:06 +0100259 for (i = 0; i < len; i++)
260 writeb(buf[i], chip->IO_ADDR_W);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200261}
262
263/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200264 * nand_read_buf - [DEFAULT] read chip data into buffer
Wolfgang Denk932394a2005-08-17 12:55:25 +0200265 * @mtd: MTD device structure
266 * @buf: buffer to store date
267 * @len: number of bytes to read
268 *
269 * Default read function for 8bit buswith
270 */
William Juulcfa460a2007-10-31 13:53:06 +0100271static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200272{
273 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100274 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200275
William Juulcfa460a2007-10-31 13:53:06 +0100276 for (i = 0; i < len; i++)
277 buf[i] = readb(chip->IO_ADDR_R);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200278}
279
280/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200281 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
Wolfgang Denk932394a2005-08-17 12:55:25 +0200282 * @mtd: MTD device structure
283 * @buf: buffer containing the data to compare
284 * @len: number of bytes to compare
285 *
286 * Default verify function for 8bit buswith
287 */
William Juulcfa460a2007-10-31 13:53:06 +0100288static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200289{
290 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100291 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200292
William Juulcfa460a2007-10-31 13:53:06 +0100293 for (i = 0; i < len; i++)
294 if (buf[i] != readb(chip->IO_ADDR_R))
Wolfgang Denk932394a2005-08-17 12:55:25 +0200295 return -EFAULT;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200296 return 0;
297}
298
299/**
300 * nand_write_buf16 - [DEFAULT] write buffer to chip
301 * @mtd: MTD device structure
302 * @buf: data buffer
303 * @len: number of bytes to write
304 *
305 * Default write function for 16bit buswith
306 */
William Juulcfa460a2007-10-31 13:53:06 +0100307static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200308{
309 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100310 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200311 u16 *p = (u16 *) buf;
312 len >>= 1;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200313
William Juulcfa460a2007-10-31 13:53:06 +0100314 for (i = 0; i < len; i++)
315 writew(p[i], chip->IO_ADDR_W);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200316
Wolfgang Denk932394a2005-08-17 12:55:25 +0200317}
318
319/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200320 * nand_read_buf16 - [DEFAULT] read chip data into buffer
Wolfgang Denk932394a2005-08-17 12:55:25 +0200321 * @mtd: MTD device structure
322 * @buf: buffer to store date
323 * @len: number of bytes to read
324 *
325 * Default read function for 16bit buswith
326 */
William Juulcfa460a2007-10-31 13:53:06 +0100327static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200328{
329 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100330 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200331 u16 *p = (u16 *) buf;
332 len >>= 1;
333
William Juulcfa460a2007-10-31 13:53:06 +0100334 for (i = 0; i < len; i++)
335 p[i] = readw(chip->IO_ADDR_R);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200336}
337
338/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200339 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
Wolfgang Denk932394a2005-08-17 12:55:25 +0200340 * @mtd: MTD device structure
341 * @buf: buffer containing the data to compare
342 * @len: number of bytes to compare
343 *
344 * Default verify function for 16bit buswith
345 */
William Juulcfa460a2007-10-31 13:53:06 +0100346static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200347{
348 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100349 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200350 u16 *p = (u16 *) buf;
351 len >>= 1;
352
William Juulcfa460a2007-10-31 13:53:06 +0100353 for (i = 0; i < len; i++)
354 if (p[i] != readw(chip->IO_ADDR_R))
Wolfgang Denk932394a2005-08-17 12:55:25 +0200355 return -EFAULT;
356
357 return 0;
358}
359
360/**
361 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
362 * @mtd: MTD device structure
363 * @ofs: offset from device start
364 * @getchip: 0, if the chip is already selected
365 *
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200366 * Check, if the block is bad.
Wolfgang Denk932394a2005-08-17 12:55:25 +0200367 */
368static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
369{
370 int page, chipnr, res = 0;
William Juulcfa460a2007-10-31 13:53:06 +0100371 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200372 u16 bad;
373
William Juulcfa460a2007-10-31 13:53:06 +0100374 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
Thomas Knoblocha7988652007-05-05 07:04:42 +0200375
Wolfgang Denk932394a2005-08-17 12:55:25 +0200376 if (getchip) {
William Juulcfa460a2007-10-31 13:53:06 +0100377 chipnr = (int)(ofs >> chip->chip_shift);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200378
William Juulcfa460a2007-10-31 13:53:06 +0100379 nand_get_device(chip, mtd, FL_READING);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200380
381 /* Select the NAND device */
William Juulcfa460a2007-10-31 13:53:06 +0100382 chip->select_chip(mtd, chipnr);
Thomas Knoblocha7988652007-05-05 07:04:42 +0200383 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200384
William Juulcfa460a2007-10-31 13:53:06 +0100385 if (chip->options & NAND_BUSWIDTH_16) {
386 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE,
387 page);
388 bad = cpu_to_le16(chip->read_word(mtd));
389 if (chip->badblockpos & 0x1)
390 bad >>= 8;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200391 if ((bad & 0xFF) != 0xff)
392 res = 1;
393 } else {
William Juulcfa460a2007-10-31 13:53:06 +0100394 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
395 if (chip->read_byte(mtd) != 0xff)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200396 res = 1;
397 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200398
William Juulcfa460a2007-10-31 13:53:06 +0100399 if (getchip)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200400 nand_release_device(mtd);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200401
Wolfgang Denk932394a2005-08-17 12:55:25 +0200402 return res;
403}
404
405/**
406 * nand_default_block_markbad - [DEFAULT] mark a block bad
407 * @mtd: MTD device structure
408 * @ofs: offset from device start
409 *
410 * This is the default implementation, which can be overridden by
411 * a hardware specific driver.
412*/
413static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
414{
William Juulcfa460a2007-10-31 13:53:06 +0100415 struct nand_chip *chip = mtd->priv;
416 uint8_t buf[2] = { 0, 0 };
417 int block, ret;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200418
Wolfgang Denk932394a2005-08-17 12:55:25 +0200419 /* Get block number */
William Juulcfa460a2007-10-31 13:53:06 +0100420 block = (int)(ofs >> chip->bbt_erase_shift);
421 if (chip->bbt)
422 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200423
424 /* Do we have a flash based bad block table ? */
William Juulcfa460a2007-10-31 13:53:06 +0100425 if (chip->options & NAND_USE_FLASH_BBT)
426 ret = nand_update_bbt(mtd, ofs);
427 else {
428 /* We write two bytes, so we dont have to mess with 16 bit
429 * access
430 */
Scott Woodc45912d2008-10-24 16:20:43 -0500431 nand_get_device(chip, mtd, FL_WRITING);
William Juulcfa460a2007-10-31 13:53:06 +0100432 ofs += mtd->oobsize;
433 chip->ops.len = chip->ops.ooblen = 2;
434 chip->ops.datbuf = NULL;
435 chip->ops.oobbuf = buf;
436 chip->ops.ooboffs = chip->badblockpos & ~0x01;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200437
William Juulcfa460a2007-10-31 13:53:06 +0100438 ret = nand_do_write_oob(mtd, ofs, &chip->ops);
Scott Woodc45912d2008-10-24 16:20:43 -0500439 nand_release_device(mtd);
William Juulcfa460a2007-10-31 13:53:06 +0100440 }
441 if (!ret)
442 mtd->ecc_stats.badblocks++;
Scott Woodc45912d2008-10-24 16:20:43 -0500443
William Juulcfa460a2007-10-31 13:53:06 +0100444 return ret;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200445}
446
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200447/**
Wolfgang Denk932394a2005-08-17 12:55:25 +0200448 * nand_check_wp - [GENERIC] check if the chip is write protected
449 * @mtd: MTD device structure
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200450 * Check, if the device is write protected
Wolfgang Denk932394a2005-08-17 12:55:25 +0200451 *
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200452 * The function expects, that the device is already selected
Wolfgang Denk932394a2005-08-17 12:55:25 +0200453 */
William Juulcfa460a2007-10-31 13:53:06 +0100454static int nand_check_wp(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200455{
William Juulcfa460a2007-10-31 13:53:06 +0100456 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200457 /* Check the WP bit */
William Juulcfa460a2007-10-31 13:53:06 +0100458 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
459 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200460}
Markus Klotzbücher43638c62006-03-06 15:04:25 +0100461
Wolfgang Denk932394a2005-08-17 12:55:25 +0200462/**
463 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
464 * @mtd: MTD device structure
465 * @ofs: offset from device start
466 * @getchip: 0, if the chip is already selected
467 * @allowbbt: 1, if its allowed to access the bbt area
468 *
469 * Check, if the block is bad. Either by reading the bad block table or
470 * calling of the scan function.
471 */
William Juulcfa460a2007-10-31 13:53:06 +0100472static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
473 int allowbbt)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200474{
William Juulcfa460a2007-10-31 13:53:06 +0100475 struct nand_chip *chip = mtd->priv;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200476
Ilya Yanok13f0fd92008-06-30 15:34:40 +0200477 if (!(chip->options & NAND_BBT_SCANNED)) {
Ilya Yanok13f0fd92008-06-30 15:34:40 +0200478 chip->options |= NAND_BBT_SCANNED;
Scott Woodff49ea82008-12-16 14:24:16 -0600479 chip->scan_bbt(mtd);
Ilya Yanok13f0fd92008-06-30 15:34:40 +0200480 }
481
William Juulcfa460a2007-10-31 13:53:06 +0100482 if (!chip->bbt)
483 return chip->block_bad(mtd, ofs, getchip);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200484
Wolfgang Denk932394a2005-08-17 12:55:25 +0200485 /* Return info from the table */
William Juulcfa460a2007-10-31 13:53:06 +0100486 return nand_isbad_bbt(mtd, ofs, allowbbt);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200487}
488
William Juulcfa460a2007-10-31 13:53:06 +0100489/*
490 * Wait for the ready pin, after a command
491 * The timeout is catched later.
492 */
493/* XXX U-BOOT XXX */
494#if 0
495void nand_wait_ready(struct mtd_info *mtd)
496{
497 struct nand_chip *chip = mtd->priv;
498 unsigned long timeo = jiffies + 2;
499
500 led_trigger_event(nand_led_trigger, LED_FULL);
501 /* wait until command is processed or timeout occures */
502 do {
503 if (chip->dev_ready(mtd))
504 break;
505 touch_softlockup_watchdog();
506 } while (time_before(jiffies, timeo));
507 led_trigger_event(nand_led_trigger, LED_OFF);
508}
509EXPORT_SYMBOL_GPL(nand_wait_ready);
510#else
511void nand_wait_ready(struct mtd_info *mtd)
512{
513 struct nand_chip *chip = mtd->priv;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200514 u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
Stefan Roese12072262008-01-05 16:43:25 +0100515
516 reset_timer();
517
518 /* wait until command is processed or timeout occures */
519 while (get_timer(0) < timeo) {
520 if (chip->dev_ready)
521 if (chip->dev_ready(mtd))
522 break;
523 }
William Juulcfa460a2007-10-31 13:53:06 +0100524}
525#endif
526
Wolfgang Denk932394a2005-08-17 12:55:25 +0200527/**
528 * nand_command - [DEFAULT] Send command to NAND device
529 * @mtd: MTD device structure
530 * @command: the command to be sent
531 * @column: the column address for this command, -1 if none
532 * @page_addr: the page address for this command, -1 if none
533 *
534 * Send command to NAND device. This function is used for small page
535 * devices (256/512 Bytes per page)
536 */
William Juulcfa460a2007-10-31 13:53:06 +0100537static void nand_command(struct mtd_info *mtd, unsigned int command,
538 int column, int page_addr)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200539{
William Juulcfa460a2007-10-31 13:53:06 +0100540 register struct nand_chip *chip = mtd->priv;
541 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
Peter Tyser8da60122009-02-04 13:47:22 -0600542 uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200543
Wolfgang Denk932394a2005-08-17 12:55:25 +0200544 /*
545 * Write out the command to the device.
546 */
547 if (command == NAND_CMD_SEQIN) {
548 int readcmd;
549
William Juulcfa460a2007-10-31 13:53:06 +0100550 if (column >= mtd->writesize) {
Wolfgang Denk932394a2005-08-17 12:55:25 +0200551 /* OOB area */
William Juulcfa460a2007-10-31 13:53:06 +0100552 column -= mtd->writesize;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200553 readcmd = NAND_CMD_READOOB;
554 } else if (column < 256) {
555 /* First 256 bytes --> READ0 */
556 readcmd = NAND_CMD_READ0;
557 } else {
558 column -= 256;
559 readcmd = NAND_CMD_READ1;
560 }
William Juulcfa460a2007-10-31 13:53:06 +0100561 chip->cmd_ctrl(mtd, readcmd, ctrl);
562 ctrl &= ~NAND_CTRL_CHANGE;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200563 }
William Juulcfa460a2007-10-31 13:53:06 +0100564 chip->cmd_ctrl(mtd, command, ctrl);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200565
William Juulcfa460a2007-10-31 13:53:06 +0100566 /*
567 * Address cycle, when necessary
568 */
569 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
570 /* Serially input address */
571 if (column != -1) {
572 /* Adjust columns for 16 bit buswidth */
573 if (chip->options & NAND_BUSWIDTH_16)
574 column >>= 1;
575 chip->cmd_ctrl(mtd, column, ctrl);
576 ctrl &= ~NAND_CTRL_CHANGE;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200577 }
William Juulcfa460a2007-10-31 13:53:06 +0100578 if (page_addr != -1) {
579 chip->cmd_ctrl(mtd, page_addr, ctrl);
580 ctrl &= ~NAND_CTRL_CHANGE;
581 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
582 /* One more address cycle for devices > 32MiB */
583 if (chip->chipsize > (32 << 20))
584 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
585 }
586 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200587
588 /*
589 * program and erase have their own busy handlers
Wolfgang Denk932394a2005-08-17 12:55:25 +0200590 * status and sequential in needs no delay
William Juulcfa460a2007-10-31 13:53:06 +0100591 */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200592 switch (command) {
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200593
Wolfgang Denk932394a2005-08-17 12:55:25 +0200594 case NAND_CMD_PAGEPROG:
595 case NAND_CMD_ERASE1:
596 case NAND_CMD_ERASE2:
597 case NAND_CMD_SEQIN:
598 case NAND_CMD_STATUS:
599 return;
600
601 case NAND_CMD_RESET:
William Juulcfa460a2007-10-31 13:53:06 +0100602 if (chip->dev_ready)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200603 break;
William Juulcfa460a2007-10-31 13:53:06 +0100604 udelay(chip->chip_delay);
605 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
606 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
607 chip->cmd_ctrl(mtd,
608 NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Peter Tyser8da60122009-02-04 13:47:22 -0600609 while (!(chip->read_byte(mtd) & NAND_STATUS_READY) &&
610 (rst_sts_cnt--));
Wolfgang Denk932394a2005-08-17 12:55:25 +0200611 return;
612
William Juulcfa460a2007-10-31 13:53:06 +0100613 /* This applies to read commands */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200614 default:
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200615 /*
Wolfgang Denk932394a2005-08-17 12:55:25 +0200616 * If we don't have access to the busy pin, we apply the given
617 * command delay
William Juulcfa460a2007-10-31 13:53:06 +0100618 */
619 if (!chip->dev_ready) {
620 udelay(chip->chip_delay);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200621 return;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200622 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200623 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200624 /* Apply this short delay always to ensure that we do wait tWB in
625 * any case on any machine. */
William Juulcfa460a2007-10-31 13:53:06 +0100626 ndelay(100);
627
628 nand_wait_ready(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200629}
630
631/**
632 * nand_command_lp - [DEFAULT] Send command to NAND large page device
633 * @mtd: MTD device structure
634 * @command: the command to be sent
635 * @column: the column address for this command, -1 if none
636 * @page_addr: the page address for this command, -1 if none
637 *
William Juulcfa460a2007-10-31 13:53:06 +0100638 * Send command to NAND device. This is the version for the new large page
639 * devices We dont have the separate regions as we have in the small page
640 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
Wolfgang Denk932394a2005-08-17 12:55:25 +0200641 */
William Juulcfa460a2007-10-31 13:53:06 +0100642static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
643 int column, int page_addr)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200644{
William Juulcfa460a2007-10-31 13:53:06 +0100645 register struct nand_chip *chip = mtd->priv;
Peter Tyser8da60122009-02-04 13:47:22 -0600646 uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200647
648 /* Emulate NAND_CMD_READOOB */
649 if (command == NAND_CMD_READOOB) {
William Juulcfa460a2007-10-31 13:53:06 +0100650 column += mtd->writesize;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200651 command = NAND_CMD_READ0;
652 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200653
William Juulcfa460a2007-10-31 13:53:06 +0100654 /* Command latch cycle */
655 chip->cmd_ctrl(mtd, command & 0xff,
656 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200657
658 if (column != -1 || page_addr != -1) {
William Juulcfa460a2007-10-31 13:53:06 +0100659 int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200660
661 /* Serially input address */
662 if (column != -1) {
663 /* Adjust columns for 16 bit buswidth */
William Juulcfa460a2007-10-31 13:53:06 +0100664 if (chip->options & NAND_BUSWIDTH_16)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200665 column >>= 1;
William Juulcfa460a2007-10-31 13:53:06 +0100666 chip->cmd_ctrl(mtd, column, ctrl);
667 ctrl &= ~NAND_CTRL_CHANGE;
668 chip->cmd_ctrl(mtd, column >> 8, ctrl);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200669 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200670 if (page_addr != -1) {
William Juulcfa460a2007-10-31 13:53:06 +0100671 chip->cmd_ctrl(mtd, page_addr, ctrl);
672 chip->cmd_ctrl(mtd, page_addr >> 8,
673 NAND_NCE | NAND_ALE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200674 /* One more address cycle for devices > 128MiB */
William Juulcfa460a2007-10-31 13:53:06 +0100675 if (chip->chipsize > (128 << 20))
676 chip->cmd_ctrl(mtd, page_addr >> 16,
677 NAND_NCE | NAND_ALE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200678 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200679 }
William Juulcfa460a2007-10-31 13:53:06 +0100680 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200681
682 /*
683 * program and erase have their own busy handlers
William Juulcfa460a2007-10-31 13:53:06 +0100684 * status, sequential in, and deplete1 need no delay
685 */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200686 switch (command) {
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200687
Wolfgang Denk932394a2005-08-17 12:55:25 +0200688 case NAND_CMD_CACHEDPROG:
689 case NAND_CMD_PAGEPROG:
690 case NAND_CMD_ERASE1:
691 case NAND_CMD_ERASE2:
692 case NAND_CMD_SEQIN:
William Juulcfa460a2007-10-31 13:53:06 +0100693 case NAND_CMD_RNDIN:
Wolfgang Denk932394a2005-08-17 12:55:25 +0200694 case NAND_CMD_STATUS:
William Juulcfa460a2007-10-31 13:53:06 +0100695 case NAND_CMD_DEPLETE1:
Wolfgang Denk932394a2005-08-17 12:55:25 +0200696 return;
697
William Juulcfa460a2007-10-31 13:53:06 +0100698 /*
699 * read error status commands require only a short delay
700 */
701 case NAND_CMD_STATUS_ERROR:
702 case NAND_CMD_STATUS_ERROR0:
703 case NAND_CMD_STATUS_ERROR1:
704 case NAND_CMD_STATUS_ERROR2:
705 case NAND_CMD_STATUS_ERROR3:
706 udelay(chip->chip_delay);
707 return;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200708
709 case NAND_CMD_RESET:
William Juulcfa460a2007-10-31 13:53:06 +0100710 if (chip->dev_ready)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200711 break;
William Juulcfa460a2007-10-31 13:53:06 +0100712 udelay(chip->chip_delay);
713 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
714 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
715 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
716 NAND_NCE | NAND_CTRL_CHANGE);
Peter Tyser8da60122009-02-04 13:47:22 -0600717 while (!(chip->read_byte(mtd) & NAND_STATUS_READY) &&
718 (rst_sts_cnt--));
William Juulcfa460a2007-10-31 13:53:06 +0100719 return;
720
721 case NAND_CMD_RNDOUT:
722 /* No ready / busy check necessary */
723 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
724 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
725 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
726 NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200727 return;
728
729 case NAND_CMD_READ0:
William Juulcfa460a2007-10-31 13:53:06 +0100730 chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
731 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
732 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
733 NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200734
William Juulcfa460a2007-10-31 13:53:06 +0100735 /* This applies to read commands */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200736 default:
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200737 /*
Wolfgang Denk932394a2005-08-17 12:55:25 +0200738 * If we don't have access to the busy pin, we apply the given
739 * command delay
William Juulcfa460a2007-10-31 13:53:06 +0100740 */
741 if (!chip->dev_ready) {
742 udelay(chip->chip_delay);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200743 return;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200744 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200745 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200746
Wolfgang Denk932394a2005-08-17 12:55:25 +0200747 /* Apply this short delay always to ensure that we do wait tWB in
748 * any case on any machine. */
William Juulcfa460a2007-10-31 13:53:06 +0100749 ndelay(100);
750
751 nand_wait_ready(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200752}
753
754/**
755 * nand_get_device - [GENERIC] Get chip for selected access
William Juulcfa460a2007-10-31 13:53:06 +0100756 * @chip: the nand chip descriptor
Wolfgang Denk932394a2005-08-17 12:55:25 +0200757 * @mtd: MTD device structure
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200758 * @new_state: the state which is requested
Wolfgang Denk932394a2005-08-17 12:55:25 +0200759 *
760 * Get the device and lock it for exclusive access
761 */
762/* XXX U-BOOT XXX */
763#if 0
William Juulcfa460a2007-10-31 13:53:06 +0100764static int
765nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200766{
William Juulcfa460a2007-10-31 13:53:06 +0100767 spinlock_t *lock = &chip->controller->lock;
768 wait_queue_head_t *wq = &chip->controller->wq;
769 DECLARE_WAITQUEUE(wait, current);
770 retry:
771 spin_lock(lock);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200772
Wolfgang Denk932394a2005-08-17 12:55:25 +0200773 /* Hardware controller shared among independend devices */
William Juulcfa460a2007-10-31 13:53:06 +0100774 /* Hardware controller shared among independend devices */
775 if (!chip->controller->active)
776 chip->controller->active = chip;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200777
William Juulcfa460a2007-10-31 13:53:06 +0100778 if (chip->controller->active == chip && chip->state == FL_READY) {
779 chip->state = new_state;
780 spin_unlock(lock);
781 return 0;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200782 }
William Juulcfa460a2007-10-31 13:53:06 +0100783 if (new_state == FL_PM_SUSPENDED) {
784 spin_unlock(lock);
785 return (chip->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
786 }
787 set_current_state(TASK_UNINTERRUPTIBLE);
788 add_wait_queue(wq, &wait);
789 spin_unlock(lock);
790 schedule();
791 remove_wait_queue(wq, &wait);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200792 goto retry;
793}
794#else
William Juulcfa460a2007-10-31 13:53:06 +0100795static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state)
796{
Marcel Ziswilereafcabd2008-06-22 16:30:06 +0200797 this->state = new_state;
William Juulcfa460a2007-10-31 13:53:06 +0100798 return 0;
799}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200800#endif
801
802/**
803 * nand_wait - [DEFAULT] wait until the command is done
804 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +0100805 * @chip: NAND chip structure
Wolfgang Denk932394a2005-08-17 12:55:25 +0200806 *
807 * Wait for command done. This applies to erase and program only
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200808 * Erase can take up to 400ms and program up to 20ms according to
Wolfgang Denk932394a2005-08-17 12:55:25 +0200809 * general NAND and SmartMedia specs
William Juulcfa460a2007-10-31 13:53:06 +0100810 */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200811/* XXX U-BOOT XXX */
812#if 0
William Juulcfa460a2007-10-31 13:53:06 +0100813static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200814{
William Juulcfa460a2007-10-31 13:53:06 +0100815
816 unsigned long timeo = jiffies;
817 int status, state = chip->state;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200818
Wolfgang Denk932394a2005-08-17 12:55:25 +0200819 if (state == FL_ERASING)
William Juulcfa460a2007-10-31 13:53:06 +0100820 timeo += (HZ * 400) / 1000;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200821 else
William Juulcfa460a2007-10-31 13:53:06 +0100822 timeo += (HZ * 20) / 1000;
823
824 led_trigger_event(nand_led_trigger, LED_FULL);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200825
826 /* Apply this short delay always to ensure that we do wait tWB in
827 * any case on any machine. */
William Juulcfa460a2007-10-31 13:53:06 +0100828 ndelay(100);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200829
William Juulcfa460a2007-10-31 13:53:06 +0100830 if ((state == FL_ERASING) && (chip->options & NAND_IS_AND))
831 chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200832 else
William Juulcfa460a2007-10-31 13:53:06 +0100833 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200834
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200835 while (time_before(jiffies, timeo)) {
William Juulcfa460a2007-10-31 13:53:06 +0100836 if (chip->dev_ready) {
837 if (chip->dev_ready(mtd))
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200838 break;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200839 } else {
William Juulcfa460a2007-10-31 13:53:06 +0100840 if (chip->read_byte(mtd) & NAND_STATUS_READY)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200841 break;
842 }
William Juulcfa460a2007-10-31 13:53:06 +0100843 cond_resched();
Wolfgang Denk932394a2005-08-17 12:55:25 +0200844 }
William Juulcfa460a2007-10-31 13:53:06 +0100845 led_trigger_event(nand_led_trigger, LED_OFF);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200846
William Juulcfa460a2007-10-31 13:53:06 +0100847 status = (int)chip->read_byte(mtd);
848 return status;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200849}
850#else
William Juulcfa460a2007-10-31 13:53:06 +0100851static int nand_wait(struct mtd_info *mtd, struct nand_chip *this)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200852{
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100853 unsigned long timeo;
William Juulcfa460a2007-10-31 13:53:06 +0100854 int state = this->state;
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100855
856 if (state == FL_ERASING)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200857 timeo = (CONFIG_SYS_HZ * 400) / 1000;
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100858 else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200859 timeo = (CONFIG_SYS_HZ * 20) / 1000;
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100860
861 if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
862 this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
863 else
864 this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
865
Bartlomiej Sieka038ccac2006-02-24 09:37:22 +0100866 reset_timer();
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100867
868 while (1) {
Bartlomiej Sieka038ccac2006-02-24 09:37:22 +0100869 if (get_timer(0) > timeo) {
870 printf("Timeout!");
Stefan Roese15784862006-11-27 17:22:19 +0100871 return 0x01;
872 }
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100873
874 if (this->dev_ready) {
875 if (this->dev_ready(mtd))
876 break;
877 } else {
878 if (this->read_byte(mtd) & NAND_STATUS_READY)
879 break;
880 }
881 }
Bartlomiej Siekaaddb2e12006-03-05 18:57:33 +0100882#ifdef PPCHAMELON_NAND_TIMER_HACK
Bartlomiej Sieka038ccac2006-02-24 09:37:22 +0100883 reset_timer();
884 while (get_timer(0) < 10);
Bartlomiej Siekaaddb2e12006-03-05 18:57:33 +0100885#endif /* PPCHAMELON_NAND_TIMER_HACK */
Bartlomiej Sieka038ccac2006-02-24 09:37:22 +0100886
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100887 return this->read_byte(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200888}
889#endif
890
891/**
William Juulcfa460a2007-10-31 13:53:06 +0100892 * nand_read_page_raw - [Intern] read raw page data without ecc
893 * @mtd: mtd info structure
894 * @chip: nand chip info structure
895 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -0500896 * @page: page number to read
David Brownell7e866612009-11-07 16:27:01 -0500897 *
898 * Not for syndrome calculating ecc controllers, which use a special oob layout
Wolfgang Denk932394a2005-08-17 12:55:25 +0200899 */
William Juulcfa460a2007-10-31 13:53:06 +0100900static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Sandeep Paulraja2c65b42009-08-10 13:27:46 -0400901 uint8_t *buf, int page)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200902{
William Juulcfa460a2007-10-31 13:53:06 +0100903 chip->read_buf(mtd, buf, mtd->writesize);
904 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
905 return 0;
906}
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200907
William Juulcfa460a2007-10-31 13:53:06 +0100908/**
David Brownell7e866612009-11-07 16:27:01 -0500909 * nand_read_page_raw_syndrome - [Intern] read raw page data without ecc
910 * @mtd: mtd info structure
911 * @chip: nand chip info structure
912 * @buf: buffer to store read data
913 * @page: page number to read
914 *
915 * We need a special oob layout and handling even when OOB isn't used.
916 */
917static int nand_read_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
918 uint8_t *buf, int page)
919{
920 int eccsize = chip->ecc.size;
921 int eccbytes = chip->ecc.bytes;
922 uint8_t *oob = chip->oob_poi;
923 int steps, size;
924
925 for (steps = chip->ecc.steps; steps > 0; steps--) {
926 chip->read_buf(mtd, buf, eccsize);
927 buf += eccsize;
928
929 if (chip->ecc.prepad) {
930 chip->read_buf(mtd, oob, chip->ecc.prepad);
931 oob += chip->ecc.prepad;
932 }
933
934 chip->read_buf(mtd, oob, eccbytes);
935 oob += eccbytes;
936
937 if (chip->ecc.postpad) {
938 chip->read_buf(mtd, oob, chip->ecc.postpad);
939 oob += chip->ecc.postpad;
940 }
941 }
942
943 size = mtd->oobsize - (oob - chip->oob_poi);
944 if (size)
945 chip->read_buf(mtd, oob, size);
946
947 return 0;
948}
949
950/**
William Juulcfa460a2007-10-31 13:53:06 +0100951 * nand_read_page_swecc - [REPLACABLE] software ecc based page read function
952 * @mtd: mtd info structure
953 * @chip: nand chip info structure
954 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -0500955 * @page: page number to read
William Juulcfa460a2007-10-31 13:53:06 +0100956 */
957static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Sandeep Paulraja2c65b42009-08-10 13:27:46 -0400958 uint8_t *buf, int page)
William Juulcfa460a2007-10-31 13:53:06 +0100959{
960 int i, eccsize = chip->ecc.size;
961 int eccbytes = chip->ecc.bytes;
962 int eccsteps = chip->ecc.steps;
963 uint8_t *p = buf;
964 uint8_t *ecc_calc = chip->buffers->ecccalc;
965 uint8_t *ecc_code = chip->buffers->ecccode;
966 uint32_t *eccpos = chip->ecc.layout->eccpos;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200967
Sandeep Paulraja2c65b42009-08-10 13:27:46 -0400968 chip->ecc.read_page_raw(mtd, chip, buf, page);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200969
William Juulcfa460a2007-10-31 13:53:06 +0100970 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
971 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200972
William Juulcfa460a2007-10-31 13:53:06 +0100973 for (i = 0; i < chip->ecc.total; i++)
974 ecc_code[i] = chip->oob_poi[eccpos[i]];
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200975
William Juulcfa460a2007-10-31 13:53:06 +0100976 eccsteps = chip->ecc.steps;
977 p = buf;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200978
William Juulcfa460a2007-10-31 13:53:06 +0100979 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
980 int stat;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200981
William Juulcfa460a2007-10-31 13:53:06 +0100982 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Scott Woodc45912d2008-10-24 16:20:43 -0500983 if (stat < 0)
984 mtd->ecc_stats.failed++;
985 else
986 mtd->ecc_stats.corrected += stat;
987 }
988 return 0;
989}
990
991/**
992 * nand_read_subpage - [REPLACABLE] software ecc based sub-page read function
993 * @mtd: mtd info structure
994 * @chip: nand chip info structure
Sandeep Paulraje25ee032009-11-07 14:24:50 -0500995 * @data_offs: offset of requested data within the page
996 * @readlen: data length
997 * @bufpoi: buffer to store read data
Scott Woodc45912d2008-10-24 16:20:43 -0500998 */
999static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
1000{
1001 int start_step, end_step, num_steps;
1002 uint32_t *eccpos = chip->ecc.layout->eccpos;
1003 uint8_t *p;
1004 int data_col_addr, i, gaps = 0;
1005 int datafrag_len, eccfrag_len, aligned_len, aligned_pos;
1006 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
1007
1008 /* Column address wihin the page aligned to ECC size (256bytes). */
1009 start_step = data_offs / chip->ecc.size;
1010 end_step = (data_offs + readlen - 1) / chip->ecc.size;
1011 num_steps = end_step - start_step + 1;
1012
1013 /* Data size aligned to ECC ecc.size*/
1014 datafrag_len = num_steps * chip->ecc.size;
1015 eccfrag_len = num_steps * chip->ecc.bytes;
1016
1017 data_col_addr = start_step * chip->ecc.size;
1018 /* If we read not a page aligned data */
1019 if (data_col_addr != 0)
1020 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
1021
1022 p = bufpoi + data_col_addr;
1023 chip->read_buf(mtd, p, datafrag_len);
1024
1025 /* Calculate ECC */
1026 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
1027 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
1028
1029 /* The performance is faster if to position offsets
1030 according to ecc.pos. Let make sure here that
1031 there are no gaps in ecc positions */
1032 for (i = 0; i < eccfrag_len - 1; i++) {
1033 if (eccpos[i + start_step * chip->ecc.bytes] + 1 !=
1034 eccpos[i + start_step * chip->ecc.bytes + 1]) {
1035 gaps = 1;
1036 break;
1037 }
1038 }
1039 if (gaps) {
1040 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
1041 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1042 } else {
1043 /* send the command to read the particular ecc bytes */
1044 /* take care about buswidth alignment in read_buf */
1045 aligned_pos = eccpos[start_step * chip->ecc.bytes] & ~(busw - 1);
1046 aligned_len = eccfrag_len;
1047 if (eccpos[start_step * chip->ecc.bytes] & (busw - 1))
1048 aligned_len++;
1049 if (eccpos[(start_step + num_steps) * chip->ecc.bytes] & (busw - 1))
1050 aligned_len++;
1051
1052 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize + aligned_pos, -1);
1053 chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len);
1054 }
1055
1056 for (i = 0; i < eccfrag_len; i++)
1057 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + start_step * chip->ecc.bytes]];
1058
1059 p = bufpoi + data_col_addr;
1060 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
1061 int stat;
1062
1063 stat = chip->ecc.correct(mtd, p, &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);
Sandeep Paulraj6cd752f2009-11-16 13:32:01 -05001064 if (stat == -1)
William Juulcfa460a2007-10-31 13:53:06 +01001065 mtd->ecc_stats.failed++;
1066 else
1067 mtd->ecc_stats.corrected += stat;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001068 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001069 return 0;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001070}
1071
Wolfgang Denk932394a2005-08-17 12:55:25 +02001072/**
William Juulcfa460a2007-10-31 13:53:06 +01001073 * nand_read_page_hwecc - [REPLACABLE] hardware ecc based page read function
1074 * @mtd: mtd info structure
1075 * @chip: nand chip info structure
1076 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -05001077 * @page: page number to read
Wolfgang Denk932394a2005-08-17 12:55:25 +02001078 *
William Juulcfa460a2007-10-31 13:53:06 +01001079 * Not for syndrome calculating ecc controllers which need a special oob layout
Wolfgang Denk932394a2005-08-17 12:55:25 +02001080 */
William Juulcfa460a2007-10-31 13:53:06 +01001081static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Sandeep Paulraja2c65b42009-08-10 13:27:46 -04001082 uint8_t *buf, int page)
Wolfgang Denk932394a2005-08-17 12:55:25 +02001083{
William Juulcfa460a2007-10-31 13:53:06 +01001084 int i, eccsize = chip->ecc.size;
1085 int eccbytes = chip->ecc.bytes;
1086 int eccsteps = chip->ecc.steps;
1087 uint8_t *p = buf;
1088 uint8_t *ecc_calc = chip->buffers->ecccalc;
1089 uint8_t *ecc_code = chip->buffers->ecccode;
1090 uint32_t *eccpos = chip->ecc.layout->eccpos;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001091
William Juulcfa460a2007-10-31 13:53:06 +01001092 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1093 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1094 chip->read_buf(mtd, p, eccsize);
1095 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1096 }
1097 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Wolfgang Denk932394a2005-08-17 12:55:25 +02001098
William Juulcfa460a2007-10-31 13:53:06 +01001099 for (i = 0; i < chip->ecc.total; i++)
1100 ecc_code[i] = chip->oob_poi[eccpos[i]];
Wolfgang Denk932394a2005-08-17 12:55:25 +02001101
William Juulcfa460a2007-10-31 13:53:06 +01001102 eccsteps = chip->ecc.steps;
1103 p = buf;
1104
1105 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1106 int stat;
1107
1108 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Sandeep Paulraj18b5a4b2009-11-07 14:25:03 -05001109 if (stat < 0)
William Juulcfa460a2007-10-31 13:53:06 +01001110 mtd->ecc_stats.failed++;
1111 else
1112 mtd->ecc_stats.corrected += stat;
1113 }
1114 return 0;
1115}
1116
1117/**
Sandeep Paulrajf83b7f92009-08-10 13:27:56 -04001118 * nand_read_page_hwecc_oob_first - [REPLACABLE] hw ecc, read oob first
1119 * @mtd: mtd info structure
1120 * @chip: nand chip info structure
1121 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -05001122 * @page: page number to read
Sandeep Paulrajf83b7f92009-08-10 13:27:56 -04001123 *
1124 * Hardware ECC for large page chips, require OOB to be read first.
1125 * For this ECC mode, the write_page method is re-used from ECC_HW.
1126 * These methods read/write ECC from the OOB area, unlike the
1127 * ECC_HW_SYNDROME support with multiple ECC steps, follows the
1128 * "infix ECC" scheme and reads/writes ECC from the data area, by
1129 * overwriting the NAND manufacturer bad block markings.
1130 */
1131static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
1132 struct nand_chip *chip, uint8_t *buf, int page)
1133{
1134 int i, eccsize = chip->ecc.size;
1135 int eccbytes = chip->ecc.bytes;
1136 int eccsteps = chip->ecc.steps;
1137 uint8_t *p = buf;
1138 uint8_t *ecc_code = chip->buffers->ecccode;
1139 uint32_t *eccpos = chip->ecc.layout->eccpos;
1140 uint8_t *ecc_calc = chip->buffers->ecccalc;
1141
1142 /* Read the OOB area first */
1143 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
1144 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1145 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1146
1147 for (i = 0; i < chip->ecc.total; i++)
1148 ecc_code[i] = chip->oob_poi[eccpos[i]];
1149
1150 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1151 int stat;
1152
1153 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1154 chip->read_buf(mtd, p, eccsize);
1155 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1156
1157 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
1158 if (stat < 0)
1159 mtd->ecc_stats.failed++;
1160 else
1161 mtd->ecc_stats.corrected += stat;
1162 }
1163 return 0;
1164}
1165
1166/**
William Juulcfa460a2007-10-31 13:53:06 +01001167 * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read
1168 * @mtd: mtd info structure
1169 * @chip: nand chip info structure
1170 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -05001171 * @page: page number to read
William Juulcfa460a2007-10-31 13:53:06 +01001172 *
1173 * The hw generator calculates the error syndrome automatically. Therefor
1174 * we need a special oob layout and handling.
1175 */
1176static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Sandeep Paulraja2c65b42009-08-10 13:27:46 -04001177 uint8_t *buf, int page)
William Juulcfa460a2007-10-31 13:53:06 +01001178{
1179 int i, eccsize = chip->ecc.size;
1180 int eccbytes = chip->ecc.bytes;
1181 int eccsteps = chip->ecc.steps;
1182 uint8_t *p = buf;
1183 uint8_t *oob = chip->oob_poi;
1184
1185 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1186 int stat;
1187
1188 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1189 chip->read_buf(mtd, p, eccsize);
1190
1191 if (chip->ecc.prepad) {
1192 chip->read_buf(mtd, oob, chip->ecc.prepad);
1193 oob += chip->ecc.prepad;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001194 }
1195
William Juulcfa460a2007-10-31 13:53:06 +01001196 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
1197 chip->read_buf(mtd, oob, eccbytes);
1198 stat = chip->ecc.correct(mtd, p, oob, NULL);
1199
Scott Woodc45912d2008-10-24 16:20:43 -05001200 if (stat < 0)
William Juulcfa460a2007-10-31 13:53:06 +01001201 mtd->ecc_stats.failed++;
1202 else
1203 mtd->ecc_stats.corrected += stat;
1204
1205 oob += eccbytes;
1206
1207 if (chip->ecc.postpad) {
1208 chip->read_buf(mtd, oob, chip->ecc.postpad);
1209 oob += chip->ecc.postpad;
1210 }
1211 }
1212
1213 /* Calculate remaining oob bytes */
1214 i = mtd->oobsize - (oob - chip->oob_poi);
1215 if (i)
1216 chip->read_buf(mtd, oob, i);
1217
1218 return 0;
1219}
1220
1221/**
1222 * nand_transfer_oob - [Internal] Transfer oob to client buffer
1223 * @chip: nand chip structure
1224 * @oob: oob destination address
1225 * @ops: oob ops structure
1226 * @len: size of oob to transfer
1227 */
1228static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
1229 struct mtd_oob_ops *ops, size_t len)
1230{
1231 switch(ops->mode) {
1232
1233 case MTD_OOB_PLACE:
1234 case MTD_OOB_RAW:
1235 memcpy(oob, chip->oob_poi + ops->ooboffs, len);
1236 return oob + len;
1237
1238 case MTD_OOB_AUTO: {
1239 struct nand_oobfree *free = chip->ecc.layout->oobfree;
1240 uint32_t boffs = 0, roffs = ops->ooboffs;
1241 size_t bytes = 0;
1242
1243 for(; free->length && len; free++, len -= bytes) {
1244 /* Read request not from offset 0 ? */
1245 if (unlikely(roffs)) {
1246 if (roffs >= free->length) {
1247 roffs -= free->length;
1248 continue;
1249 }
1250 boffs = free->offset + roffs;
1251 bytes = min_t(size_t, len,
1252 (free->length - roffs));
1253 roffs = 0;
1254 } else {
1255 bytes = min_t(size_t, len, free->length);
1256 boffs = free->offset;
1257 }
1258 memcpy(oob, chip->oob_poi + boffs, bytes);
1259 oob += bytes;
1260 }
1261 return oob;
1262 }
1263 default:
1264 BUG();
1265 }
1266 return NULL;
1267}
1268
1269/**
1270 * nand_do_read_ops - [Internal] Read data with ECC
1271 *
1272 * @mtd: MTD device structure
1273 * @from: offset to read from
1274 * @ops: oob ops structure
1275 *
1276 * Internal function. Called with chip held.
1277 */
1278static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1279 struct mtd_oob_ops *ops)
1280{
1281 int chipnr, page, realpage, col, bytes, aligned;
1282 struct nand_chip *chip = mtd->priv;
1283 struct mtd_ecc_stats stats;
1284 int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1285 int sndcmd = 1;
1286 int ret = 0;
1287 uint32_t readlen = ops->len;
1288 uint32_t oobreadlen = ops->ooblen;
1289 uint8_t *bufpoi, *oob, *buf;
1290
1291 stats = mtd->ecc_stats;
1292
1293 chipnr = (int)(from >> chip->chip_shift);
1294 chip->select_chip(mtd, chipnr);
1295
1296 realpage = (int)(from >> chip->page_shift);
1297 page = realpage & chip->pagemask;
1298
1299 col = (int)(from & (mtd->writesize - 1));
1300
1301 buf = ops->datbuf;
1302 oob = ops->oobbuf;
1303
1304 while(1) {
1305 bytes = min(mtd->writesize - col, readlen);
1306 aligned = (bytes == mtd->writesize);
1307
1308 /* Is the current page in the buffer ? */
1309 if (realpage != chip->pagebuf || oob) {
1310 bufpoi = aligned ? buf : chip->buffers->databuf;
1311
1312 if (likely(sndcmd)) {
1313 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
1314 sndcmd = 0;
1315 }
1316
1317 /* Now read the page into the buffer */
1318 if (unlikely(ops->mode == MTD_OOB_RAW))
Sandeep Paulraja2c65b42009-08-10 13:27:46 -04001319 ret = chip->ecc.read_page_raw(mtd, chip,
1320 bufpoi, page);
Scott Woodc45912d2008-10-24 16:20:43 -05001321 else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob)
1322 ret = chip->ecc.read_subpage(mtd, chip, col, bytes, bufpoi);
William Juulcfa460a2007-10-31 13:53:06 +01001323 else
Sandeep Paulraja2c65b42009-08-10 13:27:46 -04001324 ret = chip->ecc.read_page(mtd, chip, bufpoi,
1325 page);
William Juulcfa460a2007-10-31 13:53:06 +01001326 if (ret < 0)
1327 break;
1328
1329 /* Transfer not aligned data */
1330 if (!aligned) {
Scott Woodc45912d2008-10-24 16:20:43 -05001331 if (!NAND_SUBPAGE_READ(chip) && !oob)
1332 chip->pagebuf = realpage;
William Juulcfa460a2007-10-31 13:53:06 +01001333 memcpy(buf, chip->buffers->databuf + col, bytes);
1334 }
1335
1336 buf += bytes;
1337
1338 if (unlikely(oob)) {
1339 /* Raw mode does data:oob:data:oob */
1340 if (ops->mode != MTD_OOB_RAW) {
1341 int toread = min(oobreadlen,
1342 chip->ecc.layout->oobavail);
1343 if (toread) {
1344 oob = nand_transfer_oob(chip,
1345 oob, ops, toread);
1346 oobreadlen -= toread;
1347 }
1348 } else
1349 buf = nand_transfer_oob(chip,
1350 buf, ops, mtd->oobsize);
1351 }
1352
1353 if (!(chip->options & NAND_NO_READRDY)) {
1354 /*
1355 * Apply delay or wait for ready/busy pin. Do
1356 * this before the AUTOINCR check, so no
1357 * problems arise if a chip which does auto
1358 * increment is marked as NOAUTOINCR by the
1359 * board driver.
1360 */
1361 if (!chip->dev_ready)
1362 udelay(chip->chip_delay);
1363 else
1364 nand_wait_ready(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02001365 }
1366 } else {
William Juulcfa460a2007-10-31 13:53:06 +01001367 memcpy(buf, chip->buffers->databuf + col, bytes);
1368 buf += bytes;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001369 }
1370
William Juulcfa460a2007-10-31 13:53:06 +01001371 readlen -= bytes;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001372
William Juulcfa460a2007-10-31 13:53:06 +01001373 if (!readlen)
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001374 break;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001375
1376 /* For subsequent reads align to page boundary. */
1377 col = 0;
1378 /* Increment page address */
1379 realpage++;
1380
William Juulcfa460a2007-10-31 13:53:06 +01001381 page = realpage & chip->pagemask;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001382 /* Check, if we cross a chip boundary */
1383 if (!page) {
1384 chipnr++;
William Juulcfa460a2007-10-31 13:53:06 +01001385 chip->select_chip(mtd, -1);
1386 chip->select_chip(mtd, chipnr);
Wolfgang Denk932394a2005-08-17 12:55:25 +02001387 }
William Juulcfa460a2007-10-31 13:53:06 +01001388
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001389 /* Check, if the chip supports auto page increment
1390 * or if we have hit a block boundary.
William Juulcfa460a2007-10-31 13:53:06 +01001391 */
1392 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck))
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001393 sndcmd = 1;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001394 }
1395
William Juulcfa460a2007-10-31 13:53:06 +01001396 ops->retlen = ops->len - (size_t) readlen;
1397 if (oob)
1398 ops->oobretlen = ops->ooblen - oobreadlen;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001399
William Juulcfa460a2007-10-31 13:53:06 +01001400 if (ret)
1401 return ret;
1402
1403 if (mtd->ecc_stats.failed - stats.failed)
1404 return -EBADMSG;
1405
1406 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001407}
1408
1409/**
William Juulcfa460a2007-10-31 13:53:06 +01001410 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
Wolfgang Denk932394a2005-08-17 12:55:25 +02001411 * @mtd: MTD device structure
1412 * @from: offset to read from
1413 * @len: number of bytes to read
1414 * @retlen: pointer to variable to store the number of read bytes
1415 * @buf: the databuffer to put data
1416 *
William Juulcfa460a2007-10-31 13:53:06 +01001417 * Get hold of the chip and call nand_do_read
Wolfgang Denk932394a2005-08-17 12:55:25 +02001418 */
William Juulcfa460a2007-10-31 13:53:06 +01001419static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1420 size_t *retlen, uint8_t *buf)
Wolfgang Denk932394a2005-08-17 12:55:25 +02001421{
William Juulcfa460a2007-10-31 13:53:06 +01001422 struct nand_chip *chip = mtd->priv;
1423 int ret;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001424
1425 /* Do not allow reads past end of device */
William Juulcfa460a2007-10-31 13:53:06 +01001426 if ((from + len) > mtd->size)
Wolfgang Denk932394a2005-08-17 12:55:25 +02001427 return -EINVAL;
William Juulcfa460a2007-10-31 13:53:06 +01001428 if (!len)
1429 return 0;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001430
William Juulcfa460a2007-10-31 13:53:06 +01001431 nand_get_device(chip, mtd, FL_READING);
Wolfgang Denk932394a2005-08-17 12:55:25 +02001432
William Juulcfa460a2007-10-31 13:53:06 +01001433 chip->ops.len = len;
1434 chip->ops.datbuf = buf;
1435 chip->ops.oobbuf = NULL;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001436
William Juulcfa460a2007-10-31 13:53:06 +01001437 ret = nand_do_read_ops(mtd, from, &chip->ops);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001438
William Juulcfa460a2007-10-31 13:53:06 +01001439 *retlen = chip->ops.retlen;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001440
Wolfgang Denk932394a2005-08-17 12:55:25 +02001441 nand_release_device(mtd);
1442
1443 return ret;
1444}
1445
William Juulcfa460a2007-10-31 13:53:06 +01001446/**
1447 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
1448 * @mtd: mtd info structure
1449 * @chip: nand chip info structure
1450 * @page: page number to read
1451 * @sndcmd: flag whether to issue read command or not
1452 */
1453static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1454 int page, int sndcmd)
1455{
1456 if (sndcmd) {
1457 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
1458 sndcmd = 0;
1459 }
1460 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1461 return sndcmd;
1462}
Wolfgang Denk932394a2005-08-17 12:55:25 +02001463
1464/**
William Juulcfa460a2007-10-31 13:53:06 +01001465 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
1466 * with syndromes
1467 * @mtd: mtd info structure
1468 * @chip: nand chip info structure
1469 * @page: page number to read
1470 * @sndcmd: flag whether to issue read command or not
1471 */
1472static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1473 int page, int sndcmd)
1474{
1475 uint8_t *buf = chip->oob_poi;
1476 int length = mtd->oobsize;
1477 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1478 int eccsize = chip->ecc.size;
1479 uint8_t *bufpoi = buf;
1480 int i, toread, sndrnd = 0, pos;
1481
1482 chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);
1483 for (i = 0; i < chip->ecc.steps; i++) {
1484 if (sndrnd) {
1485 pos = eccsize + i * (eccsize + chunk);
1486 if (mtd->writesize > 512)
1487 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);
1488 else
1489 chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);
1490 } else
1491 sndrnd = 1;
1492 toread = min_t(int, length, chunk);
1493 chip->read_buf(mtd, bufpoi, toread);
1494 bufpoi += toread;
1495 length -= toread;
1496 }
1497 if (length > 0)
1498 chip->read_buf(mtd, bufpoi, length);
1499
1500 return 1;
1501}
1502
1503/**
1504 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
1505 * @mtd: mtd info structure
1506 * @chip: nand chip info structure
1507 * @page: page number to write
1508 */
1509static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1510 int page)
1511{
1512 int status = 0;
1513 const uint8_t *buf = chip->oob_poi;
1514 int length = mtd->oobsize;
1515
1516 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);
1517 chip->write_buf(mtd, buf, length);
1518 /* Send command to program the OOB data */
1519 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1520
1521 status = chip->waitfunc(mtd, chip);
1522
1523 return status & NAND_STATUS_FAIL ? -EIO : 0;
1524}
1525
1526/**
1527 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
1528 * with syndrome - only for large page flash !
1529 * @mtd: mtd info structure
1530 * @chip: nand chip info structure
1531 * @page: page number to write
1532 */
1533static int nand_write_oob_syndrome(struct mtd_info *mtd,
1534 struct nand_chip *chip, int page)
1535{
1536 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1537 int eccsize = chip->ecc.size, length = mtd->oobsize;
1538 int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;
1539 const uint8_t *bufpoi = chip->oob_poi;
1540
1541 /*
1542 * data-ecc-data-ecc ... ecc-oob
1543 * or
1544 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1545 */
1546 if (!chip->ecc.prepad && !chip->ecc.postpad) {
1547 pos = steps * (eccsize + chunk);
1548 steps = 0;
1549 } else
1550 pos = eccsize;
1551
1552 chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
1553 for (i = 0; i < steps; i++) {
1554 if (sndcmd) {
1555 if (mtd->writesize <= 512) {
1556 uint32_t fill = 0xFFFFFFFF;
1557
1558 len = eccsize;
1559 while (len > 0) {
1560 int num = min_t(int, len, 4);
1561 chip->write_buf(mtd, (uint8_t *)&fill,
1562 num);
1563 len -= num;
1564 }
1565 } else {
1566 pos = eccsize + i * (eccsize + chunk);
1567 chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);
1568 }
1569 } else
1570 sndcmd = 1;
1571 len = min_t(int, length, chunk);
1572 chip->write_buf(mtd, bufpoi, len);
1573 bufpoi += len;
1574 length -= len;
1575 }
1576 if (length > 0)
1577 chip->write_buf(mtd, bufpoi, length);
1578
1579 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1580 status = chip->waitfunc(mtd, chip);
1581
1582 return status & NAND_STATUS_FAIL ? -EIO : 0;
1583}
1584
1585/**
1586 * nand_do_read_oob - [Intern] NAND read out-of-band
1587 * @mtd: MTD device structure
1588 * @from: offset to read from
1589 * @ops: oob operations description structure
1590 *
1591 * NAND read out-of-band data from the spare area
1592 */
1593static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1594 struct mtd_oob_ops *ops)
1595{
1596 int page, realpage, chipnr, sndcmd = 1;
1597 struct nand_chip *chip = mtd->priv;
1598 int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1599 int readlen = ops->ooblen;
1600 int len;
1601 uint8_t *buf = ops->oobbuf;
1602
1603 MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08Lx, len = %i\n",
1604 (unsigned long long)from, readlen);
1605
1606 if (ops->mode == MTD_OOB_AUTO)
1607 len = chip->ecc.layout->oobavail;
1608 else
1609 len = mtd->oobsize;
1610
1611 if (unlikely(ops->ooboffs >= len)) {
1612 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
1613 "Attempt to start read outside oob\n");
1614 return -EINVAL;
1615 }
1616
1617 /* Do not allow reads past end of device */
1618 if (unlikely(from >= mtd->size ||
1619 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
1620 (from >> chip->page_shift)) * len)) {
1621 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
1622 "Attempt read beyond end of device\n");
1623 return -EINVAL;
1624 }
1625
1626 chipnr = (int)(from >> chip->chip_shift);
1627 chip->select_chip(mtd, chipnr);
1628
1629 /* Shift to get page */
1630 realpage = (int)(from >> chip->page_shift);
1631 page = realpage & chip->pagemask;
1632
1633 while(1) {
1634 sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd);
1635
1636 len = min(len, readlen);
1637 buf = nand_transfer_oob(chip, buf, ops, len);
1638
1639 if (!(chip->options & NAND_NO_READRDY)) {
1640 /*
1641 * Apply delay or wait for ready/busy pin. Do this
1642 * before the AUTOINCR check, so no problems arise if a
1643 * chip which does auto increment is marked as
1644 * NOAUTOINCR by the board driver.
1645 */
1646 if (!chip->dev_ready)
1647 udelay(chip->chip_delay);
1648 else
1649 nand_wait_ready(mtd);
1650 }
1651
1652 readlen -= len;
1653 if (!readlen)
1654 break;
1655
1656 /* Increment page address */
1657 realpage++;
1658
1659 page = realpage & chip->pagemask;
1660 /* Check, if we cross a chip boundary */
1661 if (!page) {
1662 chipnr++;
1663 chip->select_chip(mtd, -1);
1664 chip->select_chip(mtd, chipnr);
1665 }
1666
1667 /* Check, if the chip supports auto page increment
1668 * or if we have hit a block boundary.
1669 */
1670 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck))
1671 sndcmd = 1;
1672 }
1673
1674 ops->oobretlen = ops->ooblen;
1675 return 0;
1676}
1677
1678/**
1679 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1680 * @mtd: MTD device structure
1681 * @from: offset to read from
1682 * @ops: oob operation description structure
1683 *
1684 * NAND read data and/or out-of-band data
1685 */
1686static int nand_read_oob(struct mtd_info *mtd, loff_t from,
1687 struct mtd_oob_ops *ops)
1688{
1689 struct nand_chip *chip = mtd->priv;
1690 int ret = -ENOTSUPP;
1691
1692 ops->retlen = 0;
1693
1694 /* Do not allow reads past end of device */
1695 if (ops->datbuf && (from + ops->len) > mtd->size) {
1696 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
1697 "Attempt read beyond end of device\n");
1698 return -EINVAL;
1699 }
1700
1701 nand_get_device(chip, mtd, FL_READING);
1702
1703 switch(ops->mode) {
1704 case MTD_OOB_PLACE:
1705 case MTD_OOB_AUTO:
1706 case MTD_OOB_RAW:
1707 break;
1708
1709 default:
1710 goto out;
1711 }
1712
1713 if (!ops->datbuf)
1714 ret = nand_do_read_oob(mtd, from, ops);
1715 else
1716 ret = nand_do_read_ops(mtd, from, ops);
1717
1718 out:
1719 nand_release_device(mtd);
1720 return ret;
1721}
1722
1723
1724/**
1725 * nand_write_page_raw - [Intern] raw page write function
1726 * @mtd: mtd info structure
1727 * @chip: nand chip info structure
1728 * @buf: data buffer
David Brownell7e866612009-11-07 16:27:01 -05001729 *
1730 * Not for syndrome calculating ecc controllers, which use a special oob layout
William Juulcfa460a2007-10-31 13:53:06 +01001731 */
1732static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1733 const uint8_t *buf)
1734{
1735 chip->write_buf(mtd, buf, mtd->writesize);
1736 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
1737}
1738
1739/**
David Brownell7e866612009-11-07 16:27:01 -05001740 * nand_write_page_raw_syndrome - [Intern] raw page write function
1741 * @mtd: mtd info structure
1742 * @chip: nand chip info structure
1743 * @buf: data buffer
1744 *
1745 * We need a special oob layout and handling even when ECC isn't checked.
1746 */
1747static void nand_write_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1748 const uint8_t *buf)
1749{
1750 int eccsize = chip->ecc.size;
1751 int eccbytes = chip->ecc.bytes;
1752 uint8_t *oob = chip->oob_poi;
1753 int steps, size;
1754
1755 for (steps = chip->ecc.steps; steps > 0; steps--) {
1756 chip->write_buf(mtd, buf, eccsize);
1757 buf += eccsize;
1758
1759 if (chip->ecc.prepad) {
1760 chip->write_buf(mtd, oob, chip->ecc.prepad);
1761 oob += chip->ecc.prepad;
1762 }
1763
1764 chip->read_buf(mtd, oob, eccbytes);
1765 oob += eccbytes;
1766
1767 if (chip->ecc.postpad) {
1768 chip->write_buf(mtd, oob, chip->ecc.postpad);
1769 oob += chip->ecc.postpad;
1770 }
1771 }
1772
1773 size = mtd->oobsize - (oob - chip->oob_poi);
1774 if (size)
1775 chip->write_buf(mtd, oob, size);
1776}
1777/**
William Juulcfa460a2007-10-31 13:53:06 +01001778 * nand_write_page_swecc - [REPLACABLE] software ecc based page write function
1779 * @mtd: mtd info structure
1780 * @chip: nand chip info structure
1781 * @buf: data buffer
1782 */
1783static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1784 const uint8_t *buf)
1785{
1786 int i, eccsize = chip->ecc.size;
1787 int eccbytes = chip->ecc.bytes;
1788 int eccsteps = chip->ecc.steps;
1789 uint8_t *ecc_calc = chip->buffers->ecccalc;
1790 const uint8_t *p = buf;
1791 uint32_t *eccpos = chip->ecc.layout->eccpos;
1792
1793 /* Software ecc calculation */
1794 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1795 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1796
1797 for (i = 0; i < chip->ecc.total; i++)
1798 chip->oob_poi[eccpos[i]] = ecc_calc[i];
1799
1800 chip->ecc.write_page_raw(mtd, chip, buf);
1801}
1802
1803/**
1804 * nand_write_page_hwecc - [REPLACABLE] hardware ecc based page write function
1805 * @mtd: mtd info structure
1806 * @chip: nand chip info structure
1807 * @buf: data buffer
1808 */
1809static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
1810 const uint8_t *buf)
1811{
1812 int i, eccsize = chip->ecc.size;
1813 int eccbytes = chip->ecc.bytes;
1814 int eccsteps = chip->ecc.steps;
1815 uint8_t *ecc_calc = chip->buffers->ecccalc;
1816 const uint8_t *p = buf;
1817 uint32_t *eccpos = chip->ecc.layout->eccpos;
1818
1819 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1820 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
1821 chip->write_buf(mtd, p, eccsize);
1822 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1823 }
1824
1825 for (i = 0; i < chip->ecc.total; i++)
1826 chip->oob_poi[eccpos[i]] = ecc_calc[i];
1827
1828 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
1829}
1830
1831/**
1832 * nand_write_page_syndrome - [REPLACABLE] hardware ecc syndrom based page write
1833 * @mtd: mtd info structure
1834 * @chip: nand chip info structure
1835 * @buf: data buffer
1836 *
1837 * The hw generator calculates the error syndrome automatically. Therefor
1838 * we need a special oob layout and handling.
1839 */
1840static void nand_write_page_syndrome(struct mtd_info *mtd,
1841 struct nand_chip *chip, const uint8_t *buf)
1842{
1843 int i, eccsize = chip->ecc.size;
1844 int eccbytes = chip->ecc.bytes;
1845 int eccsteps = chip->ecc.steps;
1846 const uint8_t *p = buf;
1847 uint8_t *oob = chip->oob_poi;
1848
1849 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1850
1851 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
1852 chip->write_buf(mtd, p, eccsize);
1853
1854 if (chip->ecc.prepad) {
1855 chip->write_buf(mtd, oob, chip->ecc.prepad);
1856 oob += chip->ecc.prepad;
1857 }
1858
1859 chip->ecc.calculate(mtd, p, oob);
1860 chip->write_buf(mtd, oob, eccbytes);
1861 oob += eccbytes;
1862
1863 if (chip->ecc.postpad) {
1864 chip->write_buf(mtd, oob, chip->ecc.postpad);
1865 oob += chip->ecc.postpad;
1866 }
1867 }
1868
1869 /* Calculate remaining oob bytes */
1870 i = mtd->oobsize - (oob - chip->oob_poi);
1871 if (i)
1872 chip->write_buf(mtd, oob, i);
1873}
1874
1875/**
1876 * nand_write_page - [REPLACEABLE] write one page
1877 * @mtd: MTD device structure
1878 * @chip: NAND chip descriptor
1879 * @buf: the data to write
1880 * @page: page number to write
1881 * @cached: cached programming
1882 * @raw: use _raw version of write_page
1883 */
1884static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
1885 const uint8_t *buf, int page, int cached, int raw)
1886{
1887 int status;
1888
1889 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
1890
1891 if (unlikely(raw))
1892 chip->ecc.write_page_raw(mtd, chip, buf);
1893 else
1894 chip->ecc.write_page(mtd, chip, buf);
1895
1896 /*
1897 * Cached progamming disabled for now, Not sure if its worth the
1898 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
1899 */
1900 cached = 0;
1901
1902 if (!cached || !(chip->options & NAND_CACHEPRG)) {
1903
1904 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1905 status = chip->waitfunc(mtd, chip);
1906 /*
1907 * See if operation failed and additional status checks are
1908 * available
1909 */
1910 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
1911 status = chip->errstat(mtd, chip, FL_WRITING, status,
1912 page);
1913
1914 if (status & NAND_STATUS_FAIL)
1915 return -EIO;
1916 } else {
1917 chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);
1918 status = chip->waitfunc(mtd, chip);
1919 }
1920
1921#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1922 /* Send command to read back the data */
1923 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1924
1925 if (chip->verify_buf(mtd, buf, mtd->writesize))
1926 return -EIO;
1927#endif
1928 return 0;
1929}
1930
1931/**
1932 * nand_fill_oob - [Internal] Transfer client buffer to oob
1933 * @chip: nand chip structure
1934 * @oob: oob data buffer
1935 * @ops: oob ops structure
1936 */
1937static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob,
1938 struct mtd_oob_ops *ops)
1939{
1940 size_t len = ops->ooblen;
1941
1942 switch(ops->mode) {
1943
1944 case MTD_OOB_PLACE:
1945 case MTD_OOB_RAW:
1946 memcpy(chip->oob_poi + ops->ooboffs, oob, len);
1947 return oob + len;
1948
1949 case MTD_OOB_AUTO: {
1950 struct nand_oobfree *free = chip->ecc.layout->oobfree;
1951 uint32_t boffs = 0, woffs = ops->ooboffs;
1952 size_t bytes = 0;
1953
1954 for(; free->length && len; free++, len -= bytes) {
1955 /* Write request not from offset 0 ? */
1956 if (unlikely(woffs)) {
1957 if (woffs >= free->length) {
1958 woffs -= free->length;
1959 continue;
1960 }
1961 boffs = free->offset + woffs;
1962 bytes = min_t(size_t, len,
1963 (free->length - woffs));
1964 woffs = 0;
1965 } else {
1966 bytes = min_t(size_t, len, free->length);
1967 boffs = free->offset;
1968 }
1969 memcpy(chip->oob_poi + boffs, oob, bytes);
1970 oob += bytes;
1971 }
1972 return oob;
1973 }
1974 default:
1975 BUG();
1976 }
1977 return NULL;
1978}
1979
1980#define NOTALIGNED(x) (x & (chip->subpagesize - 1)) != 0
1981
1982/**
1983 * nand_do_write_ops - [Internal] NAND write with ECC
1984 * @mtd: MTD device structure
1985 * @to: offset to write to
1986 * @ops: oob operations description structure
1987 *
1988 * NAND write with ECC
1989 */
1990static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
1991 struct mtd_oob_ops *ops)
1992{
1993 int chipnr, realpage, page, blockmask, column;
1994 struct nand_chip *chip = mtd->priv;
1995 uint32_t writelen = ops->len;
1996 uint8_t *oob = ops->oobbuf;
1997 uint8_t *buf = ops->datbuf;
1998 int ret, subpage;
1999
2000 ops->retlen = 0;
2001 if (!writelen)
2002 return 0;
2003
2004 /* reject writes, which are not page aligned */
2005 if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {
2006 printk(KERN_NOTICE "nand_write: "
2007 "Attempt to write not page aligned data\n");
2008 return -EINVAL;
2009 }
2010
2011 column = to & (mtd->writesize - 1);
2012 subpage = column || (writelen & (mtd->writesize - 1));
2013
2014 if (subpage && oob)
2015 return -EINVAL;
2016
2017 chipnr = (int)(to >> chip->chip_shift);
2018 chip->select_chip(mtd, chipnr);
2019
2020 /* Check, if it is write protected */
2021 if (nand_check_wp(mtd)) {
2022 printk (KERN_NOTICE "nand_do_write_ops: Device is write protected\n");
2023 return -EIO;
2024 }
2025
2026 realpage = (int)(to >> chip->page_shift);
2027 page = realpage & chip->pagemask;
2028 blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
2029
2030 /* Invalidate the page cache, when we write to the cached page */
2031 if (to <= (chip->pagebuf << chip->page_shift) &&
2032 (chip->pagebuf << chip->page_shift) < (to + ops->len))
2033 chip->pagebuf = -1;
2034
2035 /* If we're not given explicit OOB data, let it be 0xFF */
2036 if (likely(!oob))
2037 memset(chip->oob_poi, 0xff, mtd->oobsize);
2038
2039 while(1) {
2040 int bytes = mtd->writesize;
2041 int cached = writelen > bytes && page != blockmask;
2042 uint8_t *wbuf = buf;
2043
2044 /* Partial page write ? */
2045 if (unlikely(column || writelen < (mtd->writesize - 1))) {
2046 cached = 0;
2047 bytes = min_t(int, bytes - column, (int) writelen);
2048 chip->pagebuf = -1;
2049 memset(chip->buffers->databuf, 0xff, mtd->writesize);
2050 memcpy(&chip->buffers->databuf[column], buf, bytes);
2051 wbuf = chip->buffers->databuf;
2052 }
2053
2054 if (unlikely(oob))
2055 oob = nand_fill_oob(chip, oob, ops);
2056
2057 ret = chip->write_page(mtd, chip, wbuf, page, cached,
2058 (ops->mode == MTD_OOB_RAW));
2059 if (ret)
2060 break;
2061
2062 writelen -= bytes;
2063 if (!writelen)
2064 break;
2065
2066 column = 0;
2067 buf += bytes;
2068 realpage++;
2069
2070 page = realpage & chip->pagemask;
2071 /* Check, if we cross a chip boundary */
2072 if (!page) {
2073 chipnr++;
2074 chip->select_chip(mtd, -1);
2075 chip->select_chip(mtd, chipnr);
2076 }
2077 }
2078
2079 ops->retlen = ops->len - writelen;
2080 if (unlikely(oob))
2081 ops->oobretlen = ops->ooblen;
2082 return ret;
2083}
2084
2085/**
2086 * nand_write - [MTD Interface] NAND write with ECC
Wolfgang Denk932394a2005-08-17 12:55:25 +02002087 * @mtd: MTD device structure
2088 * @to: offset to write to
2089 * @len: number of bytes to write
2090 * @retlen: pointer to variable to store the number of written bytes
2091 * @buf: the data to write
2092 *
William Juulcfa460a2007-10-31 13:53:06 +01002093 * NAND write with ECC
2094 */
2095static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2096 size_t *retlen, const uint8_t *buf)
2097{
2098 struct nand_chip *chip = mtd->priv;
2099 int ret;
2100
2101 /* Do not allow reads past end of device */
2102 if ((to + len) > mtd->size)
2103 return -EINVAL;
2104 if (!len)
2105 return 0;
2106
2107 nand_get_device(chip, mtd, FL_WRITING);
2108
2109 chip->ops.len = len;
2110 chip->ops.datbuf = (uint8_t *)buf;
2111 chip->ops.oobbuf = NULL;
2112
2113 ret = nand_do_write_ops(mtd, to, &chip->ops);
2114
2115 *retlen = chip->ops.retlen;
2116
2117 nand_release_device(mtd);
2118
2119 return ret;
2120}
2121
2122/**
2123 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
2124 * @mtd: MTD device structure
2125 * @to: offset to write to
2126 * @ops: oob operation description structure
2127 *
Wolfgang Denk932394a2005-08-17 12:55:25 +02002128 * NAND write out-of-band
2129 */
William Juulcfa460a2007-10-31 13:53:06 +01002130static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
2131 struct mtd_oob_ops *ops)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002132{
William Juulcfa460a2007-10-31 13:53:06 +01002133 int chipnr, page, status, len;
2134 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002135
Scott Wood3167c532008-06-20 12:38:57 -05002136 MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n",
William Juulcfa460a2007-10-31 13:53:06 +01002137 (unsigned int)to, (int)ops->ooblen);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002138
William Juulcfa460a2007-10-31 13:53:06 +01002139 if (ops->mode == MTD_OOB_AUTO)
2140 len = chip->ecc.layout->oobavail;
2141 else
2142 len = mtd->oobsize;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002143
2144 /* Do not allow write past end of page */
William Juulcfa460a2007-10-31 13:53:06 +01002145 if ((ops->ooboffs + ops->ooblen) > len) {
Scott Wood3167c532008-06-20 12:38:57 -05002146 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: "
2147 "Attempt to write past end of page\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002148 return -EINVAL;
2149 }
2150
William Juulcfa460a2007-10-31 13:53:06 +01002151 if (unlikely(ops->ooboffs >= len)) {
2152 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
2153 "Attempt to start write outside oob\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002154 return -EINVAL;
2155 }
2156
William Juulcfa460a2007-10-31 13:53:06 +01002157 /* Do not allow reads past end of device */
2158 if (unlikely(to >= mtd->size ||
2159 ops->ooboffs + ops->ooblen >
2160 ((mtd->size >> chip->page_shift) -
2161 (to >> chip->page_shift)) * len)) {
2162 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
2163 "Attempt write beyond end of device\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002164 return -EINVAL;
2165 }
2166
William Juulcfa460a2007-10-31 13:53:06 +01002167 chipnr = (int)(to >> chip->chip_shift);
2168 chip->select_chip(mtd, chipnr);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002169
William Juulcfa460a2007-10-31 13:53:06 +01002170 /* Shift to get page */
2171 page = (int)(to >> chip->page_shift);
2172
2173 /*
2174 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
2175 * of my DiskOnChip 2000 test units) will clear the whole data page too
2176 * if we don't do this. I have no clue why, but I seem to have 'fixed'
2177 * it in the doc2000 driver in August 1999. dwmw2.
2178 */
2179 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002180
2181 /* Check, if it is write protected */
2182 if (nand_check_wp(mtd))
William Juulcfa460a2007-10-31 13:53:06 +01002183 return -EROFS;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002184
Wolfgang Denk932394a2005-08-17 12:55:25 +02002185 /* Invalidate the page cache, if we write to the cached page */
William Juulcfa460a2007-10-31 13:53:06 +01002186 if (page == chip->pagebuf)
2187 chip->pagebuf = -1;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002188
William Juulcfa460a2007-10-31 13:53:06 +01002189 memset(chip->oob_poi, 0xff, mtd->oobsize);
2190 nand_fill_oob(chip, ops->oobbuf, ops);
2191 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
2192 memset(chip->oob_poi, 0xff, mtd->oobsize);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002193
William Juulcfa460a2007-10-31 13:53:06 +01002194 if (status)
2195 return status;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002196
William Juulcfa460a2007-10-31 13:53:06 +01002197 ops->oobretlen = ops->ooblen;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002198
William Juulcfa460a2007-10-31 13:53:06 +01002199 return 0;
2200}
Wolfgang Denk932394a2005-08-17 12:55:25 +02002201
William Juulcfa460a2007-10-31 13:53:06 +01002202/**
2203 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2204 * @mtd: MTD device structure
2205 * @to: offset to write to
2206 * @ops: oob operation description structure
2207 */
2208static int nand_write_oob(struct mtd_info *mtd, loff_t to,
2209 struct mtd_oob_ops *ops)
2210{
2211 struct nand_chip *chip = mtd->priv;
2212 int ret = -ENOTSUPP;
2213
2214 ops->retlen = 0;
2215
2216 /* Do not allow writes past end of device */
2217 if (ops->datbuf && (to + ops->len) > mtd->size) {
2218 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
2219 "Attempt read beyond end of device\n");
2220 return -EINVAL;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002221 }
Wolfgang Denk932394a2005-08-17 12:55:25 +02002222
William Juulcfa460a2007-10-31 13:53:06 +01002223 nand_get_device(chip, mtd, FL_WRITING);
2224
2225 switch(ops->mode) {
2226 case MTD_OOB_PLACE:
2227 case MTD_OOB_AUTO:
2228 case MTD_OOB_RAW:
2229 break;
2230
2231 default:
2232 goto out;
2233 }
2234
2235 if (!ops->datbuf)
2236 ret = nand_do_write_oob(mtd, to, ops);
2237 else
2238 ret = nand_do_write_ops(mtd, to, ops);
2239
2240 out:
2241 nand_release_device(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002242 return ret;
2243}
Wolfgang Denk932394a2005-08-17 12:55:25 +02002244
2245/**
2246 * single_erease_cmd - [GENERIC] NAND standard block erase command function
2247 * @mtd: MTD device structure
2248 * @page: the page address of the block which will be erased
2249 *
2250 * Standard erase command for NAND chips
2251 */
William Juulcfa460a2007-10-31 13:53:06 +01002252static void single_erase_cmd(struct mtd_info *mtd, int page)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002253{
William Juulcfa460a2007-10-31 13:53:06 +01002254 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002255 /* Send commands to erase a block */
William Juulcfa460a2007-10-31 13:53:06 +01002256 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2257 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002258}
2259
2260/**
2261 * multi_erease_cmd - [GENERIC] AND specific block erase command function
2262 * @mtd: MTD device structure
2263 * @page: the page address of the block which will be erased
2264 *
2265 * AND multi block erase command function
2266 * Erase 4 consecutive blocks
2267 */
William Juulcfa460a2007-10-31 13:53:06 +01002268static void multi_erase_cmd(struct mtd_info *mtd, int page)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002269{
William Juulcfa460a2007-10-31 13:53:06 +01002270 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002271 /* Send commands to erase a block */
William Juulcfa460a2007-10-31 13:53:06 +01002272 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2273 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2274 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2275 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2276 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002277}
2278
2279/**
2280 * nand_erase - [MTD Interface] erase block(s)
2281 * @mtd: MTD device structure
2282 * @instr: erase instruction
2283 *
2284 * Erase one ore more blocks
2285 */
William Juulcfa460a2007-10-31 13:53:06 +01002286static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002287{
William Juulcfa460a2007-10-31 13:53:06 +01002288 return nand_erase_nand(mtd, instr, 0);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002289}
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002290
William Juulcfa460a2007-10-31 13:53:06 +01002291#define BBT_PAGE_MASK 0xffffff3f
Wolfgang Denk932394a2005-08-17 12:55:25 +02002292/**
William Juulcfa460a2007-10-31 13:53:06 +01002293 * nand_erase_nand - [Internal] erase block(s)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002294 * @mtd: MTD device structure
2295 * @instr: erase instruction
2296 * @allowbbt: allow erasing the bbt area
2297 *
2298 * Erase one ore more blocks
2299 */
William Juulcfa460a2007-10-31 13:53:06 +01002300int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2301 int allowbbt)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002302{
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002303 int page, status, pages_per_block, ret, chipnr;
William Juulcfa460a2007-10-31 13:53:06 +01002304 struct nand_chip *chip = mtd->priv;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002305 loff_t rewrite_bbt[CONFIG_SYS_NAND_MAX_CHIPS] = {0};
William Juulcfa460a2007-10-31 13:53:06 +01002306 unsigned int bbt_masked_page = 0xffffffff;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002307 loff_t len;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002308
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002309 MTDDEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%012llx, "
2310 "len = %llu\n", (unsigned long long) instr->addr,
2311 (unsigned long long) instr->len);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002312
2313 /* Start address must align on block boundary */
William Juulcfa460a2007-10-31 13:53:06 +01002314 if (instr->addr & ((1 << chip->phys_erase_shift) - 1)) {
Scott Wood3167c532008-06-20 12:38:57 -05002315 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002316 return -EINVAL;
2317 }
2318
2319 /* Length must align on block boundary */
William Juulcfa460a2007-10-31 13:53:06 +01002320 if (instr->len & ((1 << chip->phys_erase_shift) - 1)) {
Scott Wood3167c532008-06-20 12:38:57 -05002321 MTDDEBUG (MTD_DEBUG_LEVEL0,
2322 "nand_erase: Length not block aligned\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002323 return -EINVAL;
2324 }
2325
2326 /* Do not allow erase past end of device */
2327 if ((instr->len + instr->addr) > mtd->size) {
Scott Wood3167c532008-06-20 12:38:57 -05002328 MTDDEBUG (MTD_DEBUG_LEVEL0,
2329 "nand_erase: Erase past end of device\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002330 return -EINVAL;
2331 }
2332
2333 instr->fail_addr = 0xffffffff;
2334
2335 /* Grab the lock and see if the device is available */
William Juulcfa460a2007-10-31 13:53:06 +01002336 nand_get_device(chip, mtd, FL_ERASING);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002337
2338 /* Shift to get first page */
William Juulcfa460a2007-10-31 13:53:06 +01002339 page = (int)(instr->addr >> chip->page_shift);
2340 chipnr = (int)(instr->addr >> chip->chip_shift);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002341
2342 /* Calculate pages in each block */
William Juulcfa460a2007-10-31 13:53:06 +01002343 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
William Juul4cbb6512007-11-08 10:39:53 +01002344
Wolfgang Denk932394a2005-08-17 12:55:25 +02002345 /* Select the NAND device */
William Juulcfa460a2007-10-31 13:53:06 +01002346 chip->select_chip(mtd, chipnr);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002347
Wolfgang Denk932394a2005-08-17 12:55:25 +02002348 /* Check, if it is write protected */
2349 if (nand_check_wp(mtd)) {
Scott Wood3167c532008-06-20 12:38:57 -05002350 MTDDEBUG (MTD_DEBUG_LEVEL0,
2351 "nand_erase: Device is write protected!!!\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002352 instr->state = MTD_ERASE_FAILED;
2353 goto erase_exit;
2354 }
2355
William Juulcfa460a2007-10-31 13:53:06 +01002356 /*
2357 * If BBT requires refresh, set the BBT page mask to see if the BBT
2358 * should be rewritten. Otherwise the mask is set to 0xffffffff which
2359 * can not be matched. This is also done when the bbt is actually
2360 * erased to avoid recusrsive updates
2361 */
2362 if (chip->options & BBT_AUTO_REFRESH && !allowbbt)
2363 bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
2364
Wolfgang Denk932394a2005-08-17 12:55:25 +02002365 /* Loop through the pages */
2366 len = instr->len;
2367
2368 instr->state = MTD_ERASING;
2369
2370 while (len) {
William Juulcfa460a2007-10-31 13:53:06 +01002371 /*
2372 * heck if we have a bad block, we do not erase bad blocks !
2373 */
2374 if (nand_block_checkbad(mtd, ((loff_t) page) <<
2375 chip->page_shift, 0, allowbbt)) {
2376 printk(KERN_WARNING "nand_erase: attempt to erase a "
2377 "bad block at page 0x%08x\n", page);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002378 instr->state = MTD_ERASE_FAILED;
2379 goto erase_exit;
2380 }
Wolfgang Denk932394a2005-08-17 12:55:25 +02002381
William Juulcfa460a2007-10-31 13:53:06 +01002382 /*
2383 * Invalidate the page cache, if we erase the block which
2384 * contains the current cached page
2385 */
2386 if (page <= chip->pagebuf && chip->pagebuf <
2387 (page + pages_per_block))
2388 chip->pagebuf = -1;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002389
William Juulcfa460a2007-10-31 13:53:06 +01002390 chip->erase_cmd(mtd, page & chip->pagemask);
2391
2392 status = chip->waitfunc(mtd, chip);
2393
2394 /*
2395 * See if operation failed and additional status checks are
2396 * available
2397 */
2398 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2399 status = chip->errstat(mtd, chip, FL_ERASING,
2400 status, page);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002401
2402 /* See if block erase succeeded */
William Juulcfa460a2007-10-31 13:53:06 +01002403 if (status & NAND_STATUS_FAIL) {
Scott Wood3167c532008-06-20 12:38:57 -05002404 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_erase: "
2405 "Failed erase, page 0x%08x\n", page);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002406 instr->state = MTD_ERASE_FAILED;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002407 instr->fail_addr = ((loff_t)page << chip->page_shift);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002408 goto erase_exit;
2409 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002410
William Juulcfa460a2007-10-31 13:53:06 +01002411 /*
2412 * If BBT requires refresh, set the BBT rewrite flag to the
2413 * page being erased
2414 */
2415 if (bbt_masked_page != 0xffffffff &&
2416 (page & BBT_PAGE_MASK) == bbt_masked_page)
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002417 rewrite_bbt[chipnr] =
2418 ((loff_t)page << chip->page_shift);
William Juulcfa460a2007-10-31 13:53:06 +01002419
Wolfgang Denk932394a2005-08-17 12:55:25 +02002420 /* Increment page address and decrement length */
William Juulcfa460a2007-10-31 13:53:06 +01002421 len -= (1 << chip->phys_erase_shift);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002422 page += pages_per_block;
2423
2424 /* Check, if we cross a chip boundary */
William Juulcfa460a2007-10-31 13:53:06 +01002425 if (len && !(page & chip->pagemask)) {
Wolfgang Denk932394a2005-08-17 12:55:25 +02002426 chipnr++;
William Juulcfa460a2007-10-31 13:53:06 +01002427 chip->select_chip(mtd, -1);
2428 chip->select_chip(mtd, chipnr);
2429
2430 /*
2431 * If BBT requires refresh and BBT-PERCHIP, set the BBT
2432 * page mask to see if this BBT should be rewritten
2433 */
2434 if (bbt_masked_page != 0xffffffff &&
2435 (chip->bbt_td->options & NAND_BBT_PERCHIP))
2436 bbt_masked_page = chip->bbt_td->pages[chipnr] &
2437 BBT_PAGE_MASK;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002438 }
2439 }
2440 instr->state = MTD_ERASE_DONE;
2441
William Juulcfa460a2007-10-31 13:53:06 +01002442 erase_exit:
Wolfgang Denk932394a2005-08-17 12:55:25 +02002443
2444 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002445
2446 /* Deselect and wake up anyone waiting on the device */
2447 nand_release_device(mtd);
2448
Scott Woodc45912d2008-10-24 16:20:43 -05002449 /* Do call back function */
2450 if (!ret)
2451 mtd_erase_callback(instr);
2452
William Juulcfa460a2007-10-31 13:53:06 +01002453 /*
2454 * If BBT requires refresh and erase was successful, rewrite any
2455 * selected bad block tables
2456 */
2457 if (bbt_masked_page == 0xffffffff || ret)
2458 return ret;
2459
2460 for (chipnr = 0; chipnr < chip->numchips; chipnr++) {
2461 if (!rewrite_bbt[chipnr])
2462 continue;
2463 /* update the BBT for chip */
2464 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt "
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002465 "(%d:0x%0llx 0x%0x)\n", chipnr, rewrite_bbt[chipnr],
2466 chip->bbt_td->pages[chipnr]);
William Juulcfa460a2007-10-31 13:53:06 +01002467 nand_update_bbt(mtd, rewrite_bbt[chipnr]);
2468 }
2469
Wolfgang Denk932394a2005-08-17 12:55:25 +02002470 /* Return more or less happy */
2471 return ret;
2472}
2473
2474/**
2475 * nand_sync - [MTD Interface] sync
2476 * @mtd: MTD device structure
2477 *
2478 * Sync is actually a wait for chip ready function
2479 */
William Juulcfa460a2007-10-31 13:53:06 +01002480static void nand_sync(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002481{
William Juulcfa460a2007-10-31 13:53:06 +01002482 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002483
Scott Wood3167c532008-06-20 12:38:57 -05002484 MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002485
2486 /* Grab the lock and see if the device is available */
William Juulcfa460a2007-10-31 13:53:06 +01002487 nand_get_device(chip, mtd, FL_SYNCING);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002488 /* Release it and go back */
William Juulcfa460a2007-10-31 13:53:06 +01002489 nand_release_device(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002490}
2491
Wolfgang Denk932394a2005-08-17 12:55:25 +02002492/**
William Juulcfa460a2007-10-31 13:53:06 +01002493 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
Wolfgang Denk932394a2005-08-17 12:55:25 +02002494 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +01002495 * @offs: offset relative to mtd start
Wolfgang Denk932394a2005-08-17 12:55:25 +02002496 */
William Juulcfa460a2007-10-31 13:53:06 +01002497static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002498{
2499 /* Check for invalid offset */
William Juulcfa460a2007-10-31 13:53:06 +01002500 if (offs > mtd->size)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002501 return -EINVAL;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002502
William Juulcfa460a2007-10-31 13:53:06 +01002503 return nand_block_checkbad(mtd, offs, 1, 0);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002504}
2505
2506/**
William Juulcfa460a2007-10-31 13:53:06 +01002507 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
Wolfgang Denk932394a2005-08-17 12:55:25 +02002508 * @mtd: MTD device structure
2509 * @ofs: offset relative to mtd start
2510 */
William Juulcfa460a2007-10-31 13:53:06 +01002511static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002512{
William Juulcfa460a2007-10-31 13:53:06 +01002513 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002514 int ret;
2515
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002516 if ((ret = nand_block_isbad(mtd, ofs))) {
2517 /* If it was bad already, return success and do nothing. */
Wolfgang Denk932394a2005-08-17 12:55:25 +02002518 if (ret > 0)
2519 return 0;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002520 return ret;
2521 }
Wolfgang Denk932394a2005-08-17 12:55:25 +02002522
William Juulcfa460a2007-10-31 13:53:06 +01002523 return chip->block_markbad(mtd, ofs);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002524}
2525
2526/**
William Juulcfa460a2007-10-31 13:53:06 +01002527 * nand_suspend - [MTD Interface] Suspend the NAND flash
2528 * @mtd: MTD device structure
2529 */
2530static int nand_suspend(struct mtd_info *mtd)
2531{
2532 struct nand_chip *chip = mtd->priv;
2533
2534 return nand_get_device(chip, mtd, FL_PM_SUSPENDED);
2535}
2536
2537/**
2538 * nand_resume - [MTD Interface] Resume the NAND flash
2539 * @mtd: MTD device structure
2540 */
2541static void nand_resume(struct mtd_info *mtd)
2542{
2543 struct nand_chip *chip = mtd->priv;
2544
2545 if (chip->state == FL_PM_SUSPENDED)
2546 nand_release_device(mtd);
2547 else
2548 printk(KERN_ERR "nand_resume() called for a chip which is not "
2549 "in suspended state\n");
2550}
2551
2552/*
2553 * Set default functions
2554 */
2555static void nand_set_defaults(struct nand_chip *chip, int busw)
2556{
2557 /* check for proper chip_delay setup, set 20us if not */
2558 if (!chip->chip_delay)
2559 chip->chip_delay = 20;
2560
2561 /* check, if a user supplied command function given */
2562 if (chip->cmdfunc == NULL)
2563 chip->cmdfunc = nand_command;
2564
2565 /* check, if a user supplied wait function given */
2566 if (chip->waitfunc == NULL)
2567 chip->waitfunc = nand_wait;
2568
2569 if (!chip->select_chip)
2570 chip->select_chip = nand_select_chip;
2571 if (!chip->read_byte)
2572 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
2573 if (!chip->read_word)
2574 chip->read_word = nand_read_word;
2575 if (!chip->block_bad)
2576 chip->block_bad = nand_block_bad;
2577 if (!chip->block_markbad)
2578 chip->block_markbad = nand_default_block_markbad;
2579 if (!chip->write_buf)
2580 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
2581 if (!chip->read_buf)
2582 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
2583 if (!chip->verify_buf)
2584 chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
2585 if (!chip->scan_bbt)
2586 chip->scan_bbt = nand_default_bbt;
2587
2588 if (!chip->controller) {
2589 chip->controller = &chip->hwcontrol;
2590
2591 /* XXX U-BOOT XXX */
2592#if 0
2593 spin_lock_init(&chip->controller->lock);
2594 init_waitqueue_head(&chip->controller->wq);
2595#endif
2596 }
2597
2598}
2599
2600/*
2601 * Get the flash and manufacturer id and lookup if the type is supported
2602 */
2603static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2604 struct nand_chip *chip,
2605 int busw, int *maf_id)
2606{
2607 struct nand_flash_dev *type = NULL;
2608 int i, dev_id, maf_idx;
Scott Woodc45912d2008-10-24 16:20:43 -05002609 int tmp_id, tmp_manf;
William Juulcfa460a2007-10-31 13:53:06 +01002610
2611 /* Select the device */
2612 chip->select_chip(mtd, 0);
2613
Karl Beldan33efde52008-09-15 16:08:03 +02002614 /*
2615 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
2616 * after power-up
2617 */
2618 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
2619
William Juulcfa460a2007-10-31 13:53:06 +01002620 /* Send the command for reading device ID */
2621 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2622
2623 /* Read manufacturer and device IDs */
2624 *maf_id = chip->read_byte(mtd);
2625 dev_id = chip->read_byte(mtd);
2626
Scott Woodc45912d2008-10-24 16:20:43 -05002627 /* Try again to make sure, as some systems the bus-hold or other
2628 * interface concerns can cause random data which looks like a
2629 * possibly credible NAND flash to appear. If the two results do
2630 * not match, ignore the device completely.
2631 */
2632
2633 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2634
2635 /* Read manufacturer and device IDs */
2636
2637 tmp_manf = chip->read_byte(mtd);
2638 tmp_id = chip->read_byte(mtd);
2639
2640 if (tmp_manf != *maf_id || tmp_id != dev_id) {
2641 printk(KERN_INFO "%s: second ID read did not match "
2642 "%02x,%02x against %02x,%02x\n", __func__,
2643 *maf_id, dev_id, tmp_manf, tmp_id);
2644 return ERR_PTR(-ENODEV);
2645 }
2646
William Juulcfa460a2007-10-31 13:53:06 +01002647 /* Lookup the flash id */
2648 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
2649 if (dev_id == nand_flash_ids[i].id) {
2650 type = &nand_flash_ids[i];
2651 break;
2652 }
2653 }
2654
2655 if (!type)
2656 return ERR_PTR(-ENODEV);
2657
2658 if (!mtd->name)
2659 mtd->name = type->name;
2660
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002661 chip->chipsize = (uint64_t)type->chipsize << 20;
William Juulcfa460a2007-10-31 13:53:06 +01002662
2663 /* Newer devices have all the information in additional id bytes */
2664 if (!type->pagesize) {
2665 int extid;
2666 /* The 3rd id byte holds MLC / multichip data */
2667 chip->cellinfo = chip->read_byte(mtd);
2668 /* The 4th id byte is the important one */
2669 extid = chip->read_byte(mtd);
2670 /* Calc pagesize */
2671 mtd->writesize = 1024 << (extid & 0x3);
2672 extid >>= 2;
2673 /* Calc oobsize */
2674 mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9);
2675 extid >>= 2;
2676 /* Calc blocksize. Blocksize is multiples of 64KiB */
2677 mtd->erasesize = (64 * 1024) << (extid & 0x03);
2678 extid >>= 2;
2679 /* Get buswidth information */
2680 busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
2681
2682 } else {
2683 /*
2684 * Old devices have chip data hardcoded in the device id table
2685 */
2686 mtd->erasesize = type->erasesize;
2687 mtd->writesize = type->pagesize;
2688 mtd->oobsize = mtd->writesize / 32;
2689 busw = type->options & NAND_BUSWIDTH_16;
2690 }
2691
2692 /* Try to identify manufacturer */
2693 for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
2694 if (nand_manuf_ids[maf_idx].id == *maf_id)
2695 break;
2696 }
2697
2698 /*
2699 * Check, if buswidth is correct. Hardware drivers should set
2700 * chip correct !
2701 */
2702 if (busw != (chip->options & NAND_BUSWIDTH_16)) {
2703 printk(KERN_INFO "NAND device: Manufacturer ID:"
2704 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
2705 dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
2706 printk(KERN_WARNING "NAND bus width %d instead %d bit\n",
2707 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
2708 busw ? 16 : 8);
2709 return ERR_PTR(-EINVAL);
2710 }
2711
2712 /* Calculate the address shift from the page size */
2713 chip->page_shift = ffs(mtd->writesize) - 1;
2714 /* Convert chipsize to number of pages per chip -1. */
2715 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2716
2717 chip->bbt_erase_shift = chip->phys_erase_shift =
2718 ffs(mtd->erasesize) - 1;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002719 if (chip->chipsize & 0xffffffff)
Sandeep Paulraj4f41e7e2009-11-07 14:24:06 -05002720 chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002721 else
2722 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)) + 31;
William Juulcfa460a2007-10-31 13:53:06 +01002723
2724 /* Set the bad block position */
2725 chip->badblockpos = mtd->writesize > 512 ?
2726 NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
2727
2728 /* Get chip options, preserve non chip based options */
2729 chip->options &= ~NAND_CHIPOPTIONS_MSK;
2730 chip->options |= type->options & NAND_CHIPOPTIONS_MSK;
2731
2732 /*
2733 * Set chip as a default. Board drivers can override it, if necessary
2734 */
2735 chip->options |= NAND_NO_AUTOINCR;
2736
2737 /* Check if chip is a not a samsung device. Do not clear the
2738 * options for chips which are not having an extended id.
2739 */
2740 if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
2741 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
2742
2743 /* Check for AND chips with 4 page planes */
2744 if (chip->options & NAND_4PAGE_ARRAY)
2745 chip->erase_cmd = multi_erase_cmd;
2746 else
2747 chip->erase_cmd = single_erase_cmd;
2748
2749 /* Do not replace user supplied command function ! */
2750 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
2751 chip->cmdfunc = nand_command_lp;
2752
Stefan Roesee52b34d2008-01-10 18:47:33 +01002753 MTDDEBUG (MTD_DEBUG_LEVEL0, "NAND device: Manufacturer ID:"
2754 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id,
2755 nand_manuf_ids[maf_idx].name, type->name);
William Juulcfa460a2007-10-31 13:53:06 +01002756
2757 return type;
2758}
2759
2760/**
2761 * nand_scan_ident - [NAND Interface] Scan for the NAND device
2762 * @mtd: MTD device structure
2763 * @maxchips: Number of chips to scan for
2764 *
2765 * This is the first phase of the normal nand_scan() function. It
2766 * reads the flash ID and sets up MTD fields accordingly.
2767 *
2768 * The mtd->owner field must be set to the module of the caller.
2769 */
2770int nand_scan_ident(struct mtd_info *mtd, int maxchips)
2771{
2772 int i, busw, nand_maf_id;
2773 struct nand_chip *chip = mtd->priv;
2774 struct nand_flash_dev *type;
2775
2776 /* Get buswidth to select the correct functions */
2777 busw = chip->options & NAND_BUSWIDTH_16;
2778 /* Set the default functions */
2779 nand_set_defaults(chip, busw);
2780
2781 /* Read the flash type */
2782 type = nand_get_flash_type(mtd, chip, busw, &nand_maf_id);
2783
2784 if (IS_ERR(type)) {
Peter Tyser10dc6a92009-02-04 13:39:40 -06002785#ifndef CONFIG_SYS_NAND_QUIET_TEST
William Juulcfa460a2007-10-31 13:53:06 +01002786 printk(KERN_WARNING "No NAND device found!!!\n");
Peter Tyser10dc6a92009-02-04 13:39:40 -06002787#endif
William Juulcfa460a2007-10-31 13:53:06 +01002788 chip->select_chip(mtd, -1);
2789 return PTR_ERR(type);
2790 }
2791
2792 /* Check for a chip array */
2793 for (i = 1; i < maxchips; i++) {
2794 chip->select_chip(mtd, i);
Karl Beldan33efde52008-09-15 16:08:03 +02002795 /* See comment in nand_get_flash_type for reset */
2796 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
William Juulcfa460a2007-10-31 13:53:06 +01002797 /* Send the command for reading device ID */
2798 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2799 /* Read manufacturer and device IDs */
2800 if (nand_maf_id != chip->read_byte(mtd) ||
2801 type->id != chip->read_byte(mtd))
2802 break;
2803 }
Wolfgang Grandegger672ed2a2009-02-11 18:38:20 +01002804#ifdef DEBUG
William Juulcfa460a2007-10-31 13:53:06 +01002805 if (i > 1)
2806 printk(KERN_INFO "%d NAND chips detected\n", i);
Wolfgang Grandegger672ed2a2009-02-11 18:38:20 +01002807#endif
William Juulcfa460a2007-10-31 13:53:06 +01002808
2809 /* Store the number of chips and calc total size for mtd */
2810 chip->numchips = i;
2811 mtd->size = i * chip->chipsize;
2812
2813 return 0;
2814}
2815
2816
2817/**
2818 * nand_scan_tail - [NAND Interface] Scan for the NAND device
2819 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +01002820 *
2821 * This is the second phase of the normal nand_scan() function. It
2822 * fills out all the uninitialized function pointers with the defaults
2823 * and scans for a bad block table if appropriate.
2824 */
2825int nand_scan_tail(struct mtd_info *mtd)
2826{
2827 int i;
2828 struct nand_chip *chip = mtd->priv;
2829
2830 if (!(chip->options & NAND_OWN_BUFFERS))
2831 chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL);
2832 if (!chip->buffers)
2833 return -ENOMEM;
2834
2835 /* Set the internal oob buffer location, just after the page data */
2836 chip->oob_poi = chip->buffers->databuf + mtd->writesize;
2837
2838 /*
2839 * If no default placement scheme is given, select an appropriate one
2840 */
2841 if (!chip->ecc.layout) {
2842 switch (mtd->oobsize) {
2843 case 8:
2844 chip->ecc.layout = &nand_oob_8;
2845 break;
2846 case 16:
2847 chip->ecc.layout = &nand_oob_16;
2848 break;
2849 case 64:
2850 chip->ecc.layout = &nand_oob_64;
2851 break;
2852 case 128:
2853 chip->ecc.layout = &nand_oob_128;
2854 break;
2855 default:
2856 printk(KERN_WARNING "No oob scheme defined for "
2857 "oobsize %d\n", mtd->oobsize);
William Juulcfa460a2007-10-31 13:53:06 +01002858 }
2859 }
2860
2861 if (!chip->write_page)
2862 chip->write_page = nand_write_page;
2863
2864 /*
2865 * check ECC mode, default to software if 3byte/512byte hardware ECC is
2866 * selected and we have 256 byte pagesize fallback to software ECC
2867 */
William Juulcfa460a2007-10-31 13:53:06 +01002868
2869 switch (chip->ecc.mode) {
Sandeep Paulrajf83b7f92009-08-10 13:27:56 -04002870 case NAND_ECC_HW_OOB_FIRST:
2871 /* Similar to NAND_ECC_HW, but a separate read_page handle */
2872 if (!chip->ecc.calculate || !chip->ecc.correct ||
2873 !chip->ecc.hwctl) {
2874 printk(KERN_WARNING "No ECC functions supplied, "
2875 "Hardware ECC not possible\n");
2876 BUG();
2877 }
2878 if (!chip->ecc.read_page)
2879 chip->ecc.read_page = nand_read_page_hwecc_oob_first;
2880
William Juulcfa460a2007-10-31 13:53:06 +01002881 case NAND_ECC_HW:
2882 /* Use standard hwecc read page function ? */
2883 if (!chip->ecc.read_page)
2884 chip->ecc.read_page = nand_read_page_hwecc;
2885 if (!chip->ecc.write_page)
2886 chip->ecc.write_page = nand_write_page_hwecc;
David Brownell7e866612009-11-07 16:27:01 -05002887 if (!chip->ecc.read_page_raw)
2888 chip->ecc.read_page_raw = nand_read_page_raw;
2889 if (!chip->ecc.write_page_raw)
2890 chip->ecc.write_page_raw = nand_write_page_raw;
William Juulcfa460a2007-10-31 13:53:06 +01002891 if (!chip->ecc.read_oob)
2892 chip->ecc.read_oob = nand_read_oob_std;
2893 if (!chip->ecc.write_oob)
2894 chip->ecc.write_oob = nand_write_oob_std;
2895
2896 case NAND_ECC_HW_SYNDROME:
Scott Wood41ef8c72008-03-18 15:29:14 -05002897 if ((!chip->ecc.calculate || !chip->ecc.correct ||
2898 !chip->ecc.hwctl) &&
2899 (!chip->ecc.read_page ||
2900 chip->ecc.read_page == nand_read_page_hwecc ||
2901 !chip->ecc.write_page ||
2902 chip->ecc.write_page == nand_write_page_hwecc)) {
William Juulcfa460a2007-10-31 13:53:06 +01002903 printk(KERN_WARNING "No ECC functions supplied, "
2904 "Hardware ECC not possible\n");
2905 BUG();
2906 }
2907 /* Use standard syndrome read/write page function ? */
2908 if (!chip->ecc.read_page)
2909 chip->ecc.read_page = nand_read_page_syndrome;
2910 if (!chip->ecc.write_page)
2911 chip->ecc.write_page = nand_write_page_syndrome;
David Brownell7e866612009-11-07 16:27:01 -05002912 if (!chip->ecc.read_page_raw)
2913 chip->ecc.read_page_raw = nand_read_page_raw_syndrome;
2914 if (!chip->ecc.write_page_raw)
2915 chip->ecc.write_page_raw = nand_write_page_raw_syndrome;
William Juulcfa460a2007-10-31 13:53:06 +01002916 if (!chip->ecc.read_oob)
2917 chip->ecc.read_oob = nand_read_oob_syndrome;
2918 if (!chip->ecc.write_oob)
2919 chip->ecc.write_oob = nand_write_oob_syndrome;
2920
2921 if (mtd->writesize >= chip->ecc.size)
2922 break;
2923 printk(KERN_WARNING "%d byte HW ECC not possible on "
2924 "%d byte page size, fallback to SW ECC\n",
2925 chip->ecc.size, mtd->writesize);
2926 chip->ecc.mode = NAND_ECC_SOFT;
2927
2928 case NAND_ECC_SOFT:
2929 chip->ecc.calculate = nand_calculate_ecc;
2930 chip->ecc.correct = nand_correct_data;
2931 chip->ecc.read_page = nand_read_page_swecc;
Scott Woodc45912d2008-10-24 16:20:43 -05002932 chip->ecc.read_subpage = nand_read_subpage;
William Juulcfa460a2007-10-31 13:53:06 +01002933 chip->ecc.write_page = nand_write_page_swecc;
David Brownell7e866612009-11-07 16:27:01 -05002934 chip->ecc.read_page_raw = nand_read_page_raw;
2935 chip->ecc.write_page_raw = nand_write_page_raw;
William Juulcfa460a2007-10-31 13:53:06 +01002936 chip->ecc.read_oob = nand_read_oob_std;
2937 chip->ecc.write_oob = nand_write_oob_std;
2938 chip->ecc.size = 256;
2939 chip->ecc.bytes = 3;
2940 break;
2941
2942 case NAND_ECC_NONE:
2943 printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. "
2944 "This is not recommended !!\n");
2945 chip->ecc.read_page = nand_read_page_raw;
2946 chip->ecc.write_page = nand_write_page_raw;
2947 chip->ecc.read_oob = nand_read_oob_std;
David Brownell7e866612009-11-07 16:27:01 -05002948 chip->ecc.read_page_raw = nand_read_page_raw;
2949 chip->ecc.write_page_raw = nand_write_page_raw;
William Juulcfa460a2007-10-31 13:53:06 +01002950 chip->ecc.write_oob = nand_write_oob_std;
2951 chip->ecc.size = mtd->writesize;
2952 chip->ecc.bytes = 0;
2953 break;
2954
2955 default:
2956 printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n",
2957 chip->ecc.mode);
2958 BUG();
2959 }
2960
2961 /*
2962 * The number of bytes available for a client to place data into
2963 * the out of band area
2964 */
2965 chip->ecc.layout->oobavail = 0;
Sandeep Paulraj5df3c2b2009-11-07 14:25:18 -05002966 for (i = 0; chip->ecc.layout->oobfree[i].length
2967 && i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++)
William Juulcfa460a2007-10-31 13:53:06 +01002968 chip->ecc.layout->oobavail +=
2969 chip->ecc.layout->oobfree[i].length;
2970 mtd->oobavail = chip->ecc.layout->oobavail;
2971
2972 /*
2973 * Set the number of read / write steps for one page depending on ECC
2974 * mode
2975 */
2976 chip->ecc.steps = mtd->writesize / chip->ecc.size;
2977 if(chip->ecc.steps * chip->ecc.size != mtd->writesize) {
2978 printk(KERN_WARNING "Invalid ecc parameters\n");
2979 BUG();
2980 }
2981 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
2982
2983 /*
2984 * Allow subpage writes up to ecc.steps. Not possible for MLC
2985 * FLASH.
2986 */
2987 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
2988 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
2989 switch(chip->ecc.steps) {
2990 case 2:
2991 mtd->subpage_sft = 1;
2992 break;
2993 case 4:
2994 case 8:
Sandeep Paulrajaad4a282009-11-07 14:24:34 -05002995 case 16:
William Juulcfa460a2007-10-31 13:53:06 +01002996 mtd->subpage_sft = 2;
2997 break;
2998 }
2999 }
3000 chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
3001
3002 /* Initialize state */
3003 chip->state = FL_READY;
3004
3005 /* De-select the device */
3006 chip->select_chip(mtd, -1);
3007
3008 /* Invalidate the pagebuffer reference */
3009 chip->pagebuf = -1;
3010
3011 /* Fill in remaining MTD driver data */
3012 mtd->type = MTD_NANDFLASH;
3013 mtd->flags = MTD_CAP_NANDFLASH;
3014 mtd->erase = nand_erase;
3015 mtd->point = NULL;
3016 mtd->unpoint = NULL;
3017 mtd->read = nand_read;
3018 mtd->write = nand_write;
3019 mtd->read_oob = nand_read_oob;
3020 mtd->write_oob = nand_write_oob;
3021 mtd->sync = nand_sync;
3022 mtd->lock = NULL;
3023 mtd->unlock = NULL;
3024 mtd->suspend = nand_suspend;
3025 mtd->resume = nand_resume;
3026 mtd->block_isbad = nand_block_isbad;
3027 mtd->block_markbad = nand_block_markbad;
3028
3029 /* propagate ecc.layout to mtd_info */
3030 mtd->ecclayout = chip->ecc.layout;
3031
3032 /* Check, if we should skip the bad block table scan */
3033 if (chip->options & NAND_SKIP_BBTSCAN)
Ilya Yanok13f0fd92008-06-30 15:34:40 +02003034 chip->options |= NAND_BBT_SCANNED;
William Juulcfa460a2007-10-31 13:53:06 +01003035
Ilya Yanok13f0fd92008-06-30 15:34:40 +02003036 return 0;
William Juulcfa460a2007-10-31 13:53:06 +01003037}
3038
3039/* module_text_address() isn't exported, and it's mostly a pointless
3040 test if this is a module _anyway_ -- they'd have to try _really_ hard
3041 to call us from in-kernel code if the core NAND support is modular. */
3042#ifdef MODULE
3043#define caller_is_module() (1)
3044#else
3045#define caller_is_module() \
3046 module_text_address((unsigned long)__builtin_return_address(0))
3047#endif
3048
3049/**
Wolfgang Denk932394a2005-08-17 12:55:25 +02003050 * nand_scan - [NAND Interface] Scan for the NAND device
3051 * @mtd: MTD device structure
3052 * @maxchips: Number of chips to scan for
3053 *
William Juulcfa460a2007-10-31 13:53:06 +01003054 * This fills out all the uninitialized function pointers
Wolfgang Denk932394a2005-08-17 12:55:25 +02003055 * with the defaults.
3056 * The flash ID is read and the mtd/chip structures are
William Juulcfa460a2007-10-31 13:53:06 +01003057 * filled with the appropriate values.
3058 * The mtd->owner field must be set to the module of the caller
Wolfgang Denk932394a2005-08-17 12:55:25 +02003059 *
3060 */
William Juulcfa460a2007-10-31 13:53:06 +01003061int nand_scan(struct mtd_info *mtd, int maxchips)
Wolfgang Denk932394a2005-08-17 12:55:25 +02003062{
William Juulcfa460a2007-10-31 13:53:06 +01003063 int ret;
Wolfgang Denk932394a2005-08-17 12:55:25 +02003064
William Juulcfa460a2007-10-31 13:53:06 +01003065 /* Many callers got this wrong, so check for it for a while... */
3066 /* XXX U-BOOT XXX */
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02003067#if 0
William Juulcfa460a2007-10-31 13:53:06 +01003068 if (!mtd->owner && caller_is_module()) {
3069 printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n");
3070 BUG();
3071 }
Wolfgang Denk932394a2005-08-17 12:55:25 +02003072#endif
William Juul4cbb6512007-11-08 10:39:53 +01003073
William Juulcfa460a2007-10-31 13:53:06 +01003074 ret = nand_scan_ident(mtd, maxchips);
3075 if (!ret)
3076 ret = nand_scan_tail(mtd);
3077 return ret;
Wolfgang Denk932394a2005-08-17 12:55:25 +02003078}
3079
3080/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02003081 * nand_release - [NAND Interface] Free resources held by the NAND device
Wolfgang Denk932394a2005-08-17 12:55:25 +02003082 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +01003083*/
3084void nand_release(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +02003085{
William Juulcfa460a2007-10-31 13:53:06 +01003086 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02003087
3088#ifdef CONFIG_MTD_PARTITIONS
3089 /* Deregister partitions */
William Juulcfa460a2007-10-31 13:53:06 +01003090 del_mtd_partitions(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02003091#endif
3092 /* Deregister the device */
William Juulcfa460a2007-10-31 13:53:06 +01003093 /* XXX U-BOOT XXX */
Wolfgang Denk932394a2005-08-17 12:55:25 +02003094#if 0
William Juulcfa460a2007-10-31 13:53:06 +01003095 del_mtd_device(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02003096#endif
William Juulcfa460a2007-10-31 13:53:06 +01003097
3098 /* Free bad block table memory */
3099 kfree(chip->bbt);
3100 if (!(chip->options & NAND_OWN_BUFFERS))
3101 kfree(chip->buffers);
Wolfgang Denk932394a2005-08-17 12:55:25 +02003102}
3103
William Juulcfa460a2007-10-31 13:53:06 +01003104/* XXX U-BOOT XXX */
3105#if 0
3106EXPORT_SYMBOL_GPL(nand_scan);
3107EXPORT_SYMBOL_GPL(nand_scan_ident);
3108EXPORT_SYMBOL_GPL(nand_scan_tail);
3109EXPORT_SYMBOL_GPL(nand_release);
3110
3111static int __init nand_base_init(void)
3112{
3113 led_trigger_register_simple("nand-disk", &nand_led_trigger);
3114 return 0;
3115}
3116
3117static void __exit nand_base_exit(void)
3118{
3119 led_trigger_unregister_simple(nand_led_trigger);
3120}
3121
3122module_init(nand_base_init);
3123module_exit(nand_base_exit);
3124
3125MODULE_LICENSE("GPL");
3126MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
3127MODULE_DESCRIPTION("Generic NAND flash driver code");
Wolfgang Denk932394a2005-08-17 12:55:25 +02003128#endif