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Masahiro Yamada81385812016-01-12 16:36:38 +09001menu "Clock"
2
Simon Glassf26c8a82015-06-23 15:39:15 -06003config CLK
4 bool "Enable clock driver support"
5 depends on DM
6 help
7 This allows drivers to be provided for clock generators, including
8 oscillators and PLLs. Devices can use a common clock API to request
9 a particular clock rate and check on available clocks. Clocks can
10 feed into other clocks in a tree structure, with multiplexers to
11 choose the source for each clock.
12
Masahiro Yamada05435892015-08-12 07:31:46 +090013config SPL_CLK
Simon Glassf26c8a82015-06-23 15:39:15 -060014 bool "Enable clock support in SPL"
Wenyou Yang0712b672017-07-31 15:21:57 +080015 depends on CLK && SPL && SPL_DM
Simon Glassf26c8a82015-06-23 15:39:15 -060016 help
17 The clock subsystem adds a small amount of overhead to the image.
18 If this is acceptable and you have a need to use clock drivers in
19 SPL, enable this option. It might provide a cleaner interface to
20 setting up clocks within SPL, and allows the same drivers to be
21 used as U-Boot proper.
Masahiro Yamada81385812016-01-12 16:36:38 +090022
Philipp Tomsich7c819e72017-06-29 01:45:01 +020023config TPL_CLK
24 bool "Enable clock support in TPL"
25 depends on CLK && TPL_DM
26 help
27 The clock subsystem adds a small amount of overhead to the image.
28 If this is acceptable and you have a need to use clock drivers in
29 SPL, enable this option. It might provide a cleaner interface to
30 setting up clocks within TPL, and allows the same drivers to be
31 used as U-Boot proper.
32
Lukasz Majewski1d7993d2019-06-24 15:50:45 +020033config SPL_CLK_CCF
34 bool "SPL Common Clock Framework [CCF] support "
Adam Forda0746672019-08-24 13:50:34 -050035 depends on SPL
Lukasz Majewski1d7993d2019-06-24 15:50:45 +020036 help
37 Enable this option if you want to (re-)use the Linux kernel's Common
38 Clock Framework [CCF] code in U-Boot's SPL.
39
Peng Fan00097632019-07-31 07:01:54 +000040config SPL_CLK_COMPOSITE_CCF
41 bool "SPL Common Clock Framework [CCF] composite clk support "
42 depends on SPL_CLK_CCF
43 help
44 Enable this option if you want to (re-)use the Linux kernel's Common
45 Clock Framework [CCF] composite code in U-Boot's SPL.
46
Lukasz Majewski1d7993d2019-06-24 15:50:45 +020047config CLK_CCF
48 bool "Common Clock Framework [CCF] support "
Lukasz Majewski1d7993d2019-06-24 15:50:45 +020049 help
50 Enable this option if you want to (re-)use the Linux kernel's Common
51 Clock Framework [CCF] code in U-Boot's clock driver.
52
Peng Fan00097632019-07-31 07:01:54 +000053config CLK_COMPOSITE_CCF
54 bool "Common Clock Framework [CCF] composite clk support "
55 depends on CLK_CCF
56 help
57 Enable this option if you want to (re-)use the Linux kernel's Common
58 Clock Framework [CCF] composite code in U-Boot's clock driver.
59
Sean Anderson7d4a7852021-12-15 11:36:19 -050060config CLK_BCM6345
61 bool "Clock controller driver for BCM6345"
62 depends on CLK && ARCH_BMIPS
63 default y
64 help
65 This clock driver adds support for enabling and disabling peripheral
66 clocks on BCM6345 SoCs. HW has no rate changing capabilities.
67
68config CLK_BOSTON
69 def_bool y if TARGET_BOSTON
70 depends on CLK
71 select REGMAP
72 select SYSCON
73 help
74 Enable this to support the clocks
75
76config CLK_CDCE9XX
77 bool "Enable CDCD9XX clock driver"
78 depends on CLK
79 help
80 Enable the clock synthesizer driver for CDCE913/925/937/949
81 series of chips.
82
Sean Anderson052bebe2021-12-15 11:36:20 -050083config CLK_ICS8N3QV01
Sean Anderson7d4a7852021-12-15 11:36:19 -050084 bool "Enable ICS8N3QV01 VCXO driver"
85 depends on CLK
86 help
87 Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled
88 Crystal Oscillator). The output frequency can be programmed via an
89 I2C interface.
90
Simon Glassb4d00b22020-02-06 09:54:53 -070091config CLK_INTEL
92 bool "Enable clock driver for Intel x86"
93 depends on CLK && X86
94 help
95 This provides very basic support for clocks on Intel SoCs. The driver
96 is barely used at present but could be expanded as needs arise.
97 Much clock configuration in U-Boot is either set up by the FSP, or
98 set up by U-Boot itself but only statically. Thus the driver does not
99 support changing clock rates, only querying them.
100
Sean Anderson7d4a7852021-12-15 11:36:19 -0500101config CLK_K210
102 bool "Clock support for Kendryte K210"
103 depends on CLK
104 help
105 This enables support clock driver for Kendryte K210 platforms.
106
107config CLK_K210_SET_RATE
108 bool "Enable setting the Kendryte K210 PLL rate"
109 depends on CLK_K210
110 help
111 Add functionality to calculate new rates for K210 PLLs. Enabling this
112 feature adds around 1K to U-Boot's final size.
113
114config CLK_MPC83XX
115 bool "Enable MPC83xx clock driver"
116 depends on CLK
117 help
118 Support for the clock driver of the MPC83xx series of SoCs.
119
Stefan Roeseb113c9b2020-07-30 13:56:16 +0200120config CLK_OCTEON
121 bool "Clock controller driver for Marvell MIPS Octeon"
122 depends on CLK && ARCH_OCTEON
123 default y
124 help
125 Enable this to support the clocks on Octeon MIPS platforms.
126
Sean Anderson7d4a7852021-12-15 11:36:19 -0500127config SANDBOX_CLK_CCF
128 bool "Sandbox Common Clock Framework [CCF] support "
129 depends on SANDBOX
130 select CLK_CCF
131 help
132 Enable this option if you want to test the Linux kernel's Common
133 Clock Framework [CCF] code in U-Boot's Sandbox clock driver.
134
135config CLK_SCMI
136 bool "Enable SCMI clock driver"
137 depends on SCMI_FIRMWARE
138 help
139 Enable this option if you want to support clock devices exposed
140 by a SCMI agent based on SCMI clock protocol communication
141 with a SCMI server.
142
Patrice Chotardf264e232017-11-15 13:14:48 +0100143config CLK_STM32F
144 bool "Enable clock driver support for STM32F family"
145 depends on CLK && (STM32F7 || STM32F4)
146 default y
147 help
148 This clock driver adds support for RCC clock management
149 for STM32F4 and STM32F7 SoCs.
150
Sean Anderson7d4a7852021-12-15 11:36:19 -0500151config CLK_STM32MP1
152 bool "Enable RCC clock driver for STM32MP1"
153 depends on ARCH_STM32MP && CLK
154 default y
155 help
156 Enable the STM32 clock (RCC) driver. Enable support for
157 manipulating STM32MP1's on-SoC clocks.
158
Eugeniy Paltseve80dac02017-12-10 21:20:08 +0300159config CLK_HSDK
Eugeniy Paltsev80a76742020-05-07 22:20:10 +0300160 bool "Enable cgu clock driver for HSDK boards"
161 depends on CLK && TARGET_HSDK
Eugeniy Paltseve80dac02017-12-10 21:20:08 +0300162 help
Eugeniy Paltsev80a76742020-05-07 22:20:10 +0300163 Enable this to support the cgu clocks on Synopsys ARC HSDK and
164 Synopsys ARC HSDK-4xD boards
Eugeniy Paltseve80dac02017-12-10 21:20:08 +0300165
Sean Anderson7d4a7852021-12-15 11:36:19 -0500166config CLK_VERSACLOCK
167 tristate "Enable VersaClock 5/6 devices"
168 depends on CLK
169 depends on CLK_CCF
170 depends on OF_CONTROL
171 help
172 This driver supports the IDT VersaClock 5 and VersaClock 6
173 programmable clock generators.
174
Siva Durga Prasad Paladugu95105082019-06-23 12:24:57 +0530175config CLK_VERSAL
176 bool "Enable clock driver support for Versal"
177 depends on ARCH_VERSAL
178 select ZYNQMP_FIRMWARE
179 help
180 This clock driver adds support for clock realted settings for
181 Versal platform.
182
Liviu Dudaua71e9072018-09-17 17:50:00 +0100183config CLK_VEXPRESS_OSC
184 bool "Enable driver for Arm Versatile Express OSC clock generators"
185 depends on CLK && VEXPRESS_CONFIG
186 help
187 This clock driver adds support for clock generators present on
188 Arm Versatile Express platforms.
189
Zhengxun2b157d82021-06-11 15:10:48 +0000190config CLK_XLNX_CLKWZRD
191 bool "Xilinx Clocking Wizard"
192 depends on CLK
193 help
194 Support for the Xilinx Clocking Wizard IP core clock generator.
195 The wizard support for dynamically reconfiguring the clocking
196 primitives for Multiply, Divide, Phase Shift/Offset, or Duty
197 Cycle. Limited by U-Boot clk uclass without set_phase API and
198 set_duty_cycle API, this driver only supports set_rate to modify
199 the frequency.
200
Sean Anderson7d4a7852021-12-15 11:36:19 -0500201config CLK_ZYNQ
202 bool "Enable clock driver support for Zynq"
203 depends on CLK && ARCH_ZYNQ
204 default y
205 help
206 This clock driver adds support for clock related settings for
207 Zynq platform.
208
Siva Durga Prasad Paladugu128ec1f2016-11-15 16:15:41 +0530209config CLK_ZYNQMP
210 bool "Enable clock driver support for ZynqMP"
211 depends on ARCH_ZYNQMP
Rajan Vaja14723ed2019-02-15 04:45:32 -0800212 select ZYNQMP_FIRMWARE
Siva Durga Prasad Paladugu128ec1f2016-11-15 16:15:41 +0530213 help
214 This clock driver adds support for clock realted settings for
215 ZynqMP platform.
216
Anup Pateld04c79d2019-06-25 06:31:02 +0000217source "drivers/clk/analogbits/Kconfig"
Wenyou Yang9e5935c2016-07-20 17:55:12 +0800218source "drivers/clk/at91/Kconfig"
Jagan Tekicf682252018-07-30 18:26:18 +0530219source "drivers/clk/exynos/Kconfig"
Peng Fanf77d4412018-10-18 14:28:30 +0200220source "drivers/clk/imx/Kconfig"
Jerome Brunetf5abfed2019-02-10 14:54:30 +0100221source "drivers/clk/meson/Kconfig"
Padmarao Begari2f27c922021-01-15 08:20:38 +0530222source "drivers/clk/microchip/Kconfig"
Marek BehĂșn82a248d2018-04-24 17:21:25 +0200223source "drivers/clk/mvebu/Kconfig"
Manivannan Sadhasivamae485b52018-06-14 23:38:35 +0530224source "drivers/clk/owl/Kconfig"
Jagan Tekicf682252018-07-30 18:26:18 +0530225source "drivers/clk/renesas/Kconfig"
Jagan Teki0d47bc72018-12-22 21:32:49 +0530226source "drivers/clk/sunxi/Kconfig"
Anup Patelc40b6df2019-02-25 08:14:49 +0000227source "drivers/clk/sifive/Kconfig"
Jagan Tekicf682252018-07-30 18:26:18 +0530228source "drivers/clk/tegra/Kconfig"
Dario Binacchid09f0632020-12-30 00:06:32 +0100229source "drivers/clk/ti/Kconfig"
Jagan Tekicf682252018-07-30 18:26:18 +0530230source "drivers/clk/uniphier/Kconfig"
Masahiro Yamada48264d92016-02-02 21:11:32 +0900231
Masahiro Yamada81385812016-01-12 16:36:38 +0900232endmenu