blob: fae3adc3de347dcb2f3425ee6bfe0c08f80c68cc [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Po-Yu Chuang750326e2009-08-10 11:00:00 +08002/*
3 * Faraday FTMAC100 Ethernet
4 *
5 * (C) Copyright 2009 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
Po-Yu Chuang750326e2009-08-10 11:00:00 +08007 */
8
9#include <config.h>
10#include <common.h>
Simon Glass1eb69ae2019-11-14 12:57:39 -070011#include <cpu_func.h>
Simon Glass7b51b572019-08-01 09:46:52 -060012#include <env.h>
Po-Yu Chuang750326e2009-08-10 11:00:00 +080013#include <malloc.h>
14#include <net.h>
Sergei Antonovadd396d2023-02-03 22:09:04 +030015#include <phy.h>
16#include <miiphy.h>
17#include <dm/device_compat.h>
Simon Glass401d1c42020-10-30 21:38:53 -060018#include <asm/global_data.h>
Simon Glassc05ed002020-05-10 11:40:11 -060019#include <linux/delay.h>
rickbe71a172017-05-23 13:48:27 +080020#include <linux/io.h>
Sergei Antonovadd396d2023-02-03 22:09:04 +030021#include <linux/iopoll.h>
Po-Yu Chuang750326e2009-08-10 11:00:00 +080022
23#include "ftmac100.h"
rickbe71a172017-05-23 13:48:27 +080024#include <dm.h>
Tom Rini5afc87e2022-11-19 18:45:40 -050025
rickbe71a172017-05-23 13:48:27 +080026DECLARE_GLOBAL_DATA_PTR;
Tom Rini5afc87e2022-11-19 18:45:40 -050027
Po-Yu Chuang750326e2009-08-10 11:00:00 +080028#define ETH_ZLEN 60
29
Sergei Antonovadd396d2023-02-03 22:09:04 +030030/* Timeout for a mdio read/write operation */
31#define FTMAC100_MDIO_TIMEOUT_USEC 10000
32
Po-Yu Chuang750326e2009-08-10 11:00:00 +080033struct ftmac100_data {
Po-Yu Chuang6f6e6e02011-01-21 15:50:37 +080034 struct ftmac100_txdes txdes[1];
35 struct ftmac100_rxdes rxdes[PKTBUFSRX];
Po-Yu Chuang750326e2009-08-10 11:00:00 +080036 int rx_index;
rickbe71a172017-05-23 13:48:27 +080037 const char *name;
Sergei Antonov9628c3e2023-02-03 22:09:03 +030038 struct ftmac100 *ftmac100;
Sergei Antonovadd396d2023-02-03 22:09:04 +030039 struct mii_dev *bus;
Po-Yu Chuang750326e2009-08-10 11:00:00 +080040};
41
42/*
43 * Reset MAC
44 */
rickbe71a172017-05-23 13:48:27 +080045static void ftmac100_reset(struct ftmac100_data *priv)
Po-Yu Chuang750326e2009-08-10 11:00:00 +080046{
Sergei Antonov9628c3e2023-02-03 22:09:03 +030047 struct ftmac100 *ftmac100 = priv->ftmac100;
Po-Yu Chuang750326e2009-08-10 11:00:00 +080048
49 debug ("%s()\n", __func__);
50
51 writel (FTMAC100_MACCR_SW_RST, &ftmac100->maccr);
52
53 while (readl (&ftmac100->maccr) & FTMAC100_MACCR_SW_RST)
rick13414942017-08-29 10:15:05 +080054 mdelay(1);
55 /*
56 * When soft reset complete, write mac address immediately maybe fail somehow
57 * Wait for a while can avoid this problem
58 */
59 mdelay(1);
Po-Yu Chuang750326e2009-08-10 11:00:00 +080060}
61
62/*
63 * Set MAC address
64 */
rickbe71a172017-05-23 13:48:27 +080065static void ftmac100_set_mac(struct ftmac100_data *priv ,
66 const unsigned char *mac)
Po-Yu Chuang750326e2009-08-10 11:00:00 +080067{
Sergei Antonov9628c3e2023-02-03 22:09:03 +030068 struct ftmac100 *ftmac100 = priv->ftmac100;
Po-Yu Chuang750326e2009-08-10 11:00:00 +080069 unsigned int maddr = mac[0] << 8 | mac[1];
70 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
71
72 debug ("%s(%x %x)\n", __func__, maddr, laddr);
73
74 writel (maddr, &ftmac100->mac_madr);
75 writel (laddr, &ftmac100->mac_ladr);
76}
77
Po-Yu Chuang750326e2009-08-10 11:00:00 +080078/*
rickbe71a172017-05-23 13:48:27 +080079 * Disable MAC
Po-Yu Chuang750326e2009-08-10 11:00:00 +080080 */
rickbe71a172017-05-23 13:48:27 +080081static void _ftmac100_halt(struct ftmac100_data *priv)
Po-Yu Chuang750326e2009-08-10 11:00:00 +080082{
Sergei Antonov9628c3e2023-02-03 22:09:03 +030083 struct ftmac100 *ftmac100 = priv->ftmac100;
Po-Yu Chuang750326e2009-08-10 11:00:00 +080084 debug ("%s()\n", __func__);
Po-Yu Chuang750326e2009-08-10 11:00:00 +080085 writel (0, &ftmac100->maccr);
86}
87
rickbe71a172017-05-23 13:48:27 +080088/*
89 * Initialize MAC
90 */
91static int _ftmac100_init(struct ftmac100_data *priv, unsigned char enetaddr[6])
Po-Yu Chuang750326e2009-08-10 11:00:00 +080092{
Sergei Antonov9628c3e2023-02-03 22:09:03 +030093 struct ftmac100 *ftmac100 = priv->ftmac100;
Po-Yu Chuang6f6e6e02011-01-21 15:50:37 +080094 struct ftmac100_txdes *txdes = priv->txdes;
95 struct ftmac100_rxdes *rxdes = priv->rxdes;
Po-Yu Chuang750326e2009-08-10 11:00:00 +080096 unsigned int maccr;
97 int i;
Po-Yu Chuang750326e2009-08-10 11:00:00 +080098 debug ("%s()\n", __func__);
99
rickbe71a172017-05-23 13:48:27 +0800100 ftmac100_reset(priv);
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800101
102 /* set the ethernet address */
rickbe71a172017-05-23 13:48:27 +0800103 ftmac100_set_mac(priv, enetaddr);
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800104
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800105
106 /* disable all interrupts */
107
108 writel (0, &ftmac100->imr);
109
110 /* initialize descriptors */
111
112 priv->rx_index = 0;
113
114 txdes[0].txdes1 = FTMAC100_TXDES1_EDOTR;
115 rxdes[PKTBUFSRX - 1].rxdes1 = FTMAC100_RXDES1_EDORR;
116
117 for (i = 0; i < PKTBUFSRX; i++) {
118 /* RXBUF_BADR */
Rick Chen28b52a62018-05-29 10:42:19 +0800119 rxdes[i].rxdes2 = (unsigned int)(unsigned long)net_rx_packets[i];
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800120 rxdes[i].rxdes1 |= FTMAC100_RXDES1_RXBUF_SIZE (PKTSIZE_ALIGN);
121 rxdes[i].rxdes0 = FTMAC100_RXDES0_RXDMA_OWN;
122 }
123
124 /* transmit ring */
125
Rick Chen28b52a62018-05-29 10:42:19 +0800126 writel ((unsigned long)txdes, &ftmac100->txr_badr);
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800127
128 /* receive ring */
129
Rick Chen28b52a62018-05-29 10:42:19 +0800130 writel ((unsigned long)rxdes, &ftmac100->rxr_badr);
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800131
132 /* poll receive descriptor automatically */
133
134 writel (FTMAC100_APTC_RXPOLL_CNT (1), &ftmac100->aptc);
135
136 /* enable transmitter, receiver */
137
138 maccr = FTMAC100_MACCR_XMT_EN |
139 FTMAC100_MACCR_RCV_EN |
140 FTMAC100_MACCR_XDMA_EN |
141 FTMAC100_MACCR_RDMA_EN |
142 FTMAC100_MACCR_CRC_APD |
143 FTMAC100_MACCR_ENRX_IN_HALFTX |
144 FTMAC100_MACCR_RX_RUNT |
145 FTMAC100_MACCR_RX_BROADPKT;
146
147 writel (maccr, &ftmac100->maccr);
148
149 return 0;
150}
151
152/*
rickbe71a172017-05-23 13:48:27 +0800153 * Free receiving buffer
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800154 */
rickbe71a172017-05-23 13:48:27 +0800155static int _ftmac100_free_pkt(struct ftmac100_data *priv)
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800156{
rickbe71a172017-05-23 13:48:27 +0800157 struct ftmac100_rxdes *curr_des;
158 curr_des = &priv->rxdes[priv->rx_index];
159 /* release buffer to DMA */
160 curr_des->rxdes0 |= FTMAC100_RXDES0_RXDMA_OWN;
161 priv->rx_index = (priv->rx_index + 1) % PKTBUFSRX;
162 return 0;
163}
164
165/*
166 * Receive a data block via Ethernet
167 */
168static int __ftmac100_recv(struct ftmac100_data *priv)
169{
Po-Yu Chuang6f6e6e02011-01-21 15:50:37 +0800170 struct ftmac100_rxdes *curr_des;
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800171 unsigned short rxlen;
172
173 curr_des = &priv->rxdes[priv->rx_index];
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800174 if (curr_des->rxdes0 & FTMAC100_RXDES0_RXDMA_OWN)
rickbe71a172017-05-23 13:48:27 +0800175 return 0;
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800176
177 if (curr_des->rxdes0 & (FTMAC100_RXDES0_RX_ERR |
178 FTMAC100_RXDES0_CRC_ERR |
179 FTMAC100_RXDES0_FTL |
180 FTMAC100_RXDES0_RUNT |
181 FTMAC100_RXDES0_RX_ODD_NB)) {
rickbe71a172017-05-23 13:48:27 +0800182 return 0;
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800183 }
184
185 rxlen = FTMAC100_RXDES0_RFL (curr_des->rxdes0);
rickce4e2372017-08-29 10:09:00 +0800186 invalidate_dcache_range(curr_des->rxdes2,curr_des->rxdes2+rxlen);
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800187 debug ("%s(): RX buffer %d, %x received\n",
188 __func__, priv->rx_index, rxlen);
189
rickbe71a172017-05-23 13:48:27 +0800190 return rxlen;
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800191}
192
193/*
194 * Send a data block via Ethernet
195 */
rickbe71a172017-05-23 13:48:27 +0800196static int _ftmac100_send(struct ftmac100_data *priv, void *packet, int length)
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800197{
Sergei Antonov9628c3e2023-02-03 22:09:03 +0300198 struct ftmac100 *ftmac100 = priv->ftmac100;
Po-Yu Chuang6f6e6e02011-01-21 15:50:37 +0800199 struct ftmac100_txdes *curr_des = priv->txdes;
Po-Yu Chuang8d8fd5b2011-01-21 15:51:25 +0800200 ulong start;
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800201
202 if (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) {
203 debug ("%s(): no TX descriptor available\n", __func__);
204 return -1;
205 }
206
Rick Chen28b52a62018-05-29 10:42:19 +0800207 debug ("%s(%lx, %x)\n", __func__, (unsigned long)packet, length);
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800208
209 length = (length < ETH_ZLEN) ? ETH_ZLEN : length;
210
211 /* initiate a transmit sequence */
212
Rick Chen28b52a62018-05-29 10:42:19 +0800213 flush_dcache_range((unsigned long)packet,(unsigned long)packet+length);
214 curr_des->txdes2 = (unsigned int)(unsigned long)packet; /* TXBUF_BADR */
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800215
216 curr_des->txdes1 &= FTMAC100_TXDES1_EDOTR;
217 curr_des->txdes1 |= FTMAC100_TXDES1_FTS |
218 FTMAC100_TXDES1_LTS |
219 FTMAC100_TXDES1_TXBUF_SIZE (length);
220
221 curr_des->txdes0 = FTMAC100_TXDES0_TXDMA_OWN;
222
223 /* start transmit */
224
225 writel (1, &ftmac100->txpd);
226
227 /* wait for transfer to succeed */
228
Po-Yu Chuang8d8fd5b2011-01-21 15:51:25 +0800229 start = get_timer(0);
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800230 while (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) {
Po-Yu Chuang8d8fd5b2011-01-21 15:51:25 +0800231 if (get_timer(start) >= 5) {
Po-Yu Chuang750326e2009-08-10 11:00:00 +0800232 debug ("%s(): timed out\n", __func__);
233 return -1;
234 }
235 }
236
237 debug ("%s(): packet sent\n", __func__);
238
239 return 0;
240}
241
rickbe71a172017-05-23 13:48:27 +0800242static int ftmac100_start(struct udevice *dev)
243{
Simon Glassc69cda22020-12-03 16:55:20 -0700244 struct eth_pdata *plat = dev_get_plat(dev);
rickbe71a172017-05-23 13:48:27 +0800245 struct ftmac100_data *priv = dev_get_priv(dev);
246
247 return _ftmac100_init(priv, plat->enetaddr);
248}
249
250static void ftmac100_stop(struct udevice *dev)
251{
252 struct ftmac100_data *priv = dev_get_priv(dev);
253 _ftmac100_halt(priv);
254}
255
256static int ftmac100_send(struct udevice *dev, void *packet, int length)
257{
258 struct ftmac100_data *priv = dev_get_priv(dev);
259 int ret;
260 ret = _ftmac100_send(priv , packet , length);
261 return ret ? 0 : -ETIMEDOUT;
262}
263
264static int ftmac100_recv(struct udevice *dev, int flags, uchar **packetp)
265{
266 struct ftmac100_data *priv = dev_get_priv(dev);
267 struct ftmac100_rxdes *curr_des;
268 curr_des = &priv->rxdes[priv->rx_index];
269 int len;
270 len = __ftmac100_recv(priv);
271 if (len)
Rick Chen28b52a62018-05-29 10:42:19 +0800272 *packetp = (uchar *)(unsigned long)curr_des->rxdes2;
rickbe71a172017-05-23 13:48:27 +0800273
274 return len ? len : -EAGAIN;
275}
276
277static int ftmac100_free_pkt(struct udevice *dev, uchar *packet, int length)
278{
279 struct ftmac100_data *priv = dev_get_priv(dev);
280 _ftmac100_free_pkt(priv);
281 return 0;
282}
283
284int ftmac100_read_rom_hwaddr(struct udevice *dev)
285{
Simon Glassc69cda22020-12-03 16:55:20 -0700286 struct eth_pdata *pdata = dev_get_plat(dev);
Simon Glass35affd72017-08-03 12:22:14 -0600287 eth_env_get_enetaddr("ethaddr", pdata->enetaddr);
rickbe71a172017-05-23 13:48:27 +0800288 return 0;
289}
290
291static const char *dtbmacaddr(u32 ifno)
292{
293 int node, len;
294 char enet[16];
295 const char *mac;
296 const char *path;
297 if (gd->fdt_blob == NULL) {
298 printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
299 return NULL;
300 }
301 node = fdt_path_offset(gd->fdt_blob, "/aliases");
302 if (node < 0)
303 return NULL;
304
305 sprintf(enet, "ethernet%d", ifno);
306 path = fdt_getprop(gd->fdt_blob, node, enet, NULL);
307 if (!path) {
308 printf("no alias for %s\n", enet);
309 return NULL;
310 }
311 node = fdt_path_offset(gd->fdt_blob, path);
312 mac = fdt_getprop(gd->fdt_blob, node, "mac-address", &len);
313 if (mac && is_valid_ethaddr((u8 *)mac))
314 return mac;
315
316 return NULL;
317}
318
Simon Glassd1998a92020-12-03 16:55:21 -0700319static int ftmac100_of_to_plat(struct udevice *dev)
rickbe71a172017-05-23 13:48:27 +0800320{
321 struct ftmac100_data *priv = dev_get_priv(dev);
Simon Glassc69cda22020-12-03 16:55:20 -0700322 struct eth_pdata *pdata = dev_get_plat(dev);
rickbe71a172017-05-23 13:48:27 +0800323 const char *mac;
Masahiro Yamada25484932020-07-17 14:36:48 +0900324 pdata->iobase = dev_read_addr(dev);
Sergei Antonov9628c3e2023-02-03 22:09:03 +0300325 priv->ftmac100 = phys_to_virt(pdata->iobase);
rickbe71a172017-05-23 13:48:27 +0800326 mac = dtbmacaddr(0);
327 if (mac)
328 memcpy(pdata->enetaddr , mac , 6);
329
330 return 0;
331}
332
Sergei Antonovadd396d2023-02-03 22:09:04 +0300333/*
334 * struct mii_bus functions
335 */
336static int ftmac100_mdio_read(struct mii_dev *bus, int addr, int devad,
337 int reg)
338{
339 struct ftmac100_data *priv = bus->priv;
340 struct ftmac100 *ftmac100 = priv->ftmac100;
341 int phycr = FTMAC100_PHYCR_PHYAD(addr) |
342 FTMAC100_PHYCR_REGAD(reg) |
343 FTMAC100_PHYCR_MIIRD;
344 int ret;
345
346 writel(phycr, &ftmac100->phycr);
347
348 ret = readl_poll_timeout(&ftmac100->phycr, phycr,
349 !(phycr & FTMAC100_PHYCR_MIIRD),
350 FTMAC100_MDIO_TIMEOUT_USEC);
351 if (ret)
352 pr_err("%s: mdio read failed (addr=0x%x reg=0x%x)\n",
353 bus->name, addr, reg);
354 else
355 ret = phycr & FTMAC100_PHYCR_MIIRDATA;
356
357 return ret;
358}
359
360static int ftmac100_mdio_write(struct mii_dev *bus, int addr, int devad,
361 int reg, u16 value)
362{
363 struct ftmac100_data *priv = bus->priv;
364 struct ftmac100 *ftmac100 = priv->ftmac100;
365 int phycr = FTMAC100_PHYCR_PHYAD(addr) |
366 FTMAC100_PHYCR_REGAD(reg) |
367 FTMAC100_PHYCR_MIIWR;
368 int ret;
369
370 writel(value, &ftmac100->phywdata);
371 writel(phycr, &ftmac100->phycr);
372
373 ret = readl_poll_timeout(&ftmac100->phycr, phycr,
374 !(phycr & FTMAC100_PHYCR_MIIWR),
375 FTMAC100_MDIO_TIMEOUT_USEC);
376 if (ret)
377 pr_err("%s: mdio write failed (addr=0x%x reg=0x%x)\n",
378 bus->name, addr, reg);
379
380 return ret;
381}
382
383static int ftmac100_mdio_init(struct udevice *dev)
384{
385 struct ftmac100_data *priv = dev_get_priv(dev);
386 struct mii_dev *bus;
387 int ret;
388
389 bus = mdio_alloc();
390 if (!bus)
391 return -ENOMEM;
392
393 bus->read = ftmac100_mdio_read;
394 bus->write = ftmac100_mdio_write;
395 bus->priv = priv;
396
397 ret = mdio_register_seq(bus, dev_seq(dev));
398 if (ret) {
399 mdio_free(bus);
400 return ret;
401 }
402
403 priv->bus = bus;
404
405 return 0;
406}
407
rickbe71a172017-05-23 13:48:27 +0800408static int ftmac100_probe(struct udevice *dev)
409{
410 struct ftmac100_data *priv = dev_get_priv(dev);
411 priv->name = dev->name;
Sergei Antonovadd396d2023-02-03 22:09:04 +0300412 int ret = 0;
413
414 ret = ftmac100_mdio_init(dev);
415 if (ret) {
416 dev_err(dev, "Failed to initialize mdiobus: %d\n", ret);
417 goto out;
418 }
419
420out:
421 return ret;
422}
423
424static int ftmac100_remove(struct udevice *dev)
425{
426 struct ftmac100_data *priv = dev_get_priv(dev);
427
428 mdio_unregister(priv->bus);
429 mdio_free(priv->bus);
430
rickbe71a172017-05-23 13:48:27 +0800431 return 0;
432}
433
434static int ftmac100_bind(struct udevice *dev)
435{
436 return device_set_name(dev, dev->name);
437}
438
439static const struct eth_ops ftmac100_ops = {
440 .start = ftmac100_start,
441 .send = ftmac100_send,
442 .recv = ftmac100_recv,
443 .stop = ftmac100_stop,
444 .free_pkt = ftmac100_free_pkt,
445};
446
447static const struct udevice_id ftmac100_ids[] = {
448 { .compatible = "andestech,atmac100" },
449 { }
450};
451
452U_BOOT_DRIVER(ftmac100) = {
Sergei Antonove9a1d8b2023-02-03 22:09:02 +0300453 .name = "ftmac100",
rickbe71a172017-05-23 13:48:27 +0800454 .id = UCLASS_ETH,
455 .of_match = ftmac100_ids,
456 .bind = ftmac100_bind,
Simon Glassd1998a92020-12-03 16:55:21 -0700457 .of_to_plat = ftmac100_of_to_plat,
rickbe71a172017-05-23 13:48:27 +0800458 .probe = ftmac100_probe,
Sergei Antonovadd396d2023-02-03 22:09:04 +0300459 .remove = ftmac100_remove,
rickbe71a172017-05-23 13:48:27 +0800460 .ops = &ftmac100_ops,
Simon Glass41575d82020-12-03 16:55:17 -0700461 .priv_auto = sizeof(struct ftmac100_data),
Simon Glasscaa4daa2020-12-03 16:55:18 -0700462 .plat_auto = sizeof(struct eth_pdata),
rickbe71a172017-05-23 13:48:27 +0800463 .flags = DM_FLAG_ALLOC_PRIV_DMA,
464};