Simon Glass | 0e23fd8 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016 Google, Inc |
| 3 | * Written by Simon Glass <sjg@chromium.org> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #include <common.h> |
Kever Yang | 12406ae | 2016-08-12 17:57:48 +0800 | [diff] [blame] | 9 | #include <clk.h> |
Simon Glass | 0e23fd8 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 10 | #include <div64.h> |
| 11 | #include <dm.h> |
| 12 | #include <pwm.h> |
| 13 | #include <regmap.h> |
| 14 | #include <syscon.h> |
| 15 | #include <asm/io.h> |
Simon Glass | 0e23fd8 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 16 | #include <asm/arch/pwm.h> |
| 17 | #include <power/regulator.h> |
| 18 | |
| 19 | DECLARE_GLOBAL_DATA_PTR; |
| 20 | |
| 21 | struct rk_pwm_priv { |
| 22 | struct rk3288_pwm *regs; |
Kever Yang | 12406ae | 2016-08-12 17:57:48 +0800 | [diff] [blame] | 23 | ulong freq; |
Kever Yang | 874ee59 | 2017-04-24 10:27:50 +0800 | [diff] [blame] | 24 | uint enable_conf; |
Simon Glass | 0e23fd8 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 25 | }; |
| 26 | |
Kever Yang | 874ee59 | 2017-04-24 10:27:50 +0800 | [diff] [blame] | 27 | static int rk_pwm_set_invert(struct udevice *dev, uint channel, bool polarity) |
| 28 | { |
| 29 | struct rk_pwm_priv *priv = dev_get_priv(dev); |
| 30 | |
| 31 | debug("%s: polarity=%u\n", __func__, polarity); |
| 32 | if (polarity) |
| 33 | priv->enable_conf |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSTIVE; |
| 34 | else |
| 35 | priv->enable_conf |= PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE; |
| 36 | |
| 37 | return 0; |
| 38 | } |
| 39 | |
Simon Glass | 0e23fd8 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 40 | static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns, |
| 41 | uint duty_ns) |
| 42 | { |
| 43 | struct rk_pwm_priv *priv = dev_get_priv(dev); |
| 44 | struct rk3288_pwm *regs = priv->regs; |
| 45 | unsigned long period, duty; |
| 46 | |
| 47 | debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns); |
| 48 | writel(PWM_SEL_SRC_CLK | PWM_OUTPUT_LEFT | PWM_LP_DISABLE | |
Kever Yang | 874ee59 | 2017-04-24 10:27:50 +0800 | [diff] [blame] | 49 | PWM_CONTINUOUS | priv->enable_conf | |
Simon Glass | 0e23fd8 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 50 | RK_PWM_DISABLE, |
| 51 | ®s->ctrl); |
| 52 | |
Kever Yang | 12406ae | 2016-08-12 17:57:48 +0800 | [diff] [blame] | 53 | period = lldiv((uint64_t)(priv->freq / 1000) * period_ns, 1000000); |
| 54 | duty = lldiv((uint64_t)(priv->freq / 1000) * duty_ns, 1000000); |
Simon Glass | 0e23fd8 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 55 | |
| 56 | writel(period, ®s->period_hpr); |
| 57 | writel(duty, ®s->duty_lpr); |
| 58 | debug("%s: period=%lu, duty=%lu\n", __func__, period, duty); |
| 59 | |
| 60 | return 0; |
| 61 | } |
| 62 | |
| 63 | static int rk_pwm_set_enable(struct udevice *dev, uint channel, bool enable) |
| 64 | { |
| 65 | struct rk_pwm_priv *priv = dev_get_priv(dev); |
| 66 | struct rk3288_pwm *regs = priv->regs; |
| 67 | |
| 68 | debug("%s: Enable '%s'\n", __func__, dev->name); |
| 69 | clrsetbits_le32(®s->ctrl, RK_PWM_ENABLE, enable ? RK_PWM_ENABLE : 0); |
| 70 | |
| 71 | return 0; |
| 72 | } |
| 73 | |
| 74 | static int rk_pwm_ofdata_to_platdata(struct udevice *dev) |
| 75 | { |
| 76 | struct rk_pwm_priv *priv = dev_get_priv(dev); |
Simon Glass | 0e23fd8 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 77 | |
Simon Glass | a821c4a | 2017-05-17 17:18:05 -0600 | [diff] [blame] | 78 | priv->regs = (struct rk3288_pwm *)devfdt_get_addr(dev); |
Simon Glass | 0e23fd8 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 79 | |
| 80 | return 0; |
| 81 | } |
| 82 | |
| 83 | static int rk_pwm_probe(struct udevice *dev) |
| 84 | { |
| 85 | struct rk_pwm_priv *priv = dev_get_priv(dev); |
Kever Yang | 12406ae | 2016-08-12 17:57:48 +0800 | [diff] [blame] | 86 | struct clk clk; |
| 87 | int ret = 0; |
Simon Glass | 0e23fd8 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 88 | |
Kever Yang | 12406ae | 2016-08-12 17:57:48 +0800 | [diff] [blame] | 89 | ret = clk_get_by_index(dev, 0, &clk); |
| 90 | if (ret < 0) { |
| 91 | debug("%s get clock fail!\n", __func__); |
| 92 | return -EINVAL; |
| 93 | } |
| 94 | priv->freq = clk_get_rate(&clk); |
Simon Glass | 3851059 | 2017-05-31 17:57:25 -0600 | [diff] [blame] | 95 | priv->enable_conf = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE; |
Kever Yang | 12406ae | 2016-08-12 17:57:48 +0800 | [diff] [blame] | 96 | |
Simon Glass | 0e23fd8 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 97 | return 0; |
| 98 | } |
| 99 | |
| 100 | static const struct pwm_ops rk_pwm_ops = { |
Kever Yang | 874ee59 | 2017-04-24 10:27:50 +0800 | [diff] [blame] | 101 | .set_invert = rk_pwm_set_invert, |
Simon Glass | 0e23fd8 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 102 | .set_config = rk_pwm_set_config, |
| 103 | .set_enable = rk_pwm_set_enable, |
| 104 | }; |
| 105 | |
| 106 | static const struct udevice_id rk_pwm_ids[] = { |
| 107 | { .compatible = "rockchip,rk3288-pwm" }, |
| 108 | { } |
| 109 | }; |
| 110 | |
| 111 | U_BOOT_DRIVER(rk_pwm) = { |
| 112 | .name = "rk_pwm", |
| 113 | .id = UCLASS_PWM, |
| 114 | .of_match = rk_pwm_ids, |
| 115 | .ops = &rk_pwm_ops, |
| 116 | .ofdata_to_platdata = rk_pwm_ofdata_to_platdata, |
| 117 | .probe = rk_pwm_probe, |
| 118 | .priv_auto_alloc_size = sizeof(struct rk_pwm_priv), |
| 119 | }; |