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Mario Sixaed7d0e2019-01-21 09:18:23 +01001/*
2 * Internal Definitions
3 */
Simon Glass1af3c7f2020-05-10 11:40:09 -06004#include <linux/stringify.h>
Mario Sixaed7d0e2019-01-21 09:18:23 +01005#define BOOTFLASH_START 0xF0000000
6
Mario Sixaed7d0e2019-01-21 09:18:23 +01007/*
8 * DDR Setup
9 */
Tom Riniaa6e94d2022-11-16 13:10:37 -050010#define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
Mario Sixaed7d0e2019-01-21 09:18:23 +010011
Tom Rini65cc0e22022-11-16 13:10:41 -050012#define CFG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
Mario Sixaed7d0e2019-01-21 09:18:23 +010013 DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
14
15#define CFG_83XX_DDR_USES_CS0
16
17/*
18 * Manually set up DDR parameters
19 */
Tom Riniaa6e94d2022-11-16 13:10:37 -050020#define CFG_SYS_SDRAM_SIZE 0x80000000 /* 2048 MiB */
Mario Sixaed7d0e2019-01-21 09:18:23 +010021
22/*
23 * The reserved memory
24 */
Tom Rini65cc0e22022-11-16 13:10:41 -050025#define CFG_SYS_FLASH_BASE 0xF0000000
Mario Sixaed7d0e2019-01-21 09:18:23 +010026
Mario Sixaed7d0e2019-01-21 09:18:23 +010027/* Reserve 768 kB for Mon */
Mario Sixaed7d0e2019-01-21 09:18:23 +010028
29/*
30 * Initial RAM Base Address Setup
31 */
Tom Rini65cc0e22022-11-16 13:10:41 -050032#define CFG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
33#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */
Mario Sixaed7d0e2019-01-21 09:18:23 +010034/*
35 * Init Local Bus Memory Controller:
36 *
37 * Bank Bus Machine PortSz Size Device
38 * ---- --- ------- ------ ----- ------
39 * 0 Local GPCM 16 bit 256MB FLASH
40 * 1 Local GPCM 8 bit 128MB GPIO/PIGGY
41 *
42 */
43
44/*
45 * FLASH on the Local Bus
46 */
Tom Rini65cc0e22022-11-16 13:10:41 -050047#define CFG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
Mario Sixaed7d0e2019-01-21 09:18:23 +010048
Tom Rini65cc0e22022-11-16 13:10:41 -050049#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE }
Mario Sixaed7d0e2019-01-21 09:18:23 +010050
Mario Sixaed7d0e2019-01-21 09:18:23 +010051#if defined(CONFIG_CMD_NAND)
Tom Rini65cc0e22022-11-16 13:10:41 -050052#define CFG_SYS_NAND_BASE CFG_SYS_KMBEC_FPGA_BASE
Mario Sixaed7d0e2019-01-21 09:18:23 +010053#endif
54
55/*
56 * For booting Linux, the board info and command line data
57 * have to be in the first 8 MB of memory, since this is
58 * the maximum mapped by the Linux kernel during initialization.
59 */
Tom Rini65cc0e22022-11-16 13:10:41 -050060#define CFG_SYS_BOOTMAPSZ (8 << 20)
Mario Sixaed7d0e2019-01-21 09:18:23 +010061
62/*
Mario Sixaed7d0e2019-01-21 09:18:23 +010063 * QE UEC ethernet configuration
64 */
65#define CONFIG_UEC_ETH