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Wu, Josh9e336902013-04-16 23:42:44 +00001/*
2 * (C) Copyright 2013 Atmel Corporation.
3 * Josh Wu <josh.wu@atmel.com>
4 *
5 * Configuation settings for the AT91SAM9N12-EK boards.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Wu, Josh9e336902013-04-16 23:42:44 +00008 */
9
10#ifndef __AT91SAM9N12_CONFIG_H_
11#define __AT91SAM9N12_CONFIG_H_
12
13/*
14 * SoC must be defined first, before hardware.h is included.
15 * In this case SoC is defined in boards.cfg.
16 */
17#include <asm/hardware.h>
18
19#define CONFIG_SYS_TEXT_BASE 0x26f00000
20
Wu, Josh9e336902013-04-16 23:42:44 +000021/* ARM asynchronous clock */
22#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
23#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
Wu, Josh9e336902013-04-16 23:42:44 +000024
25/* Misc CPU related */
26#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27#define CONFIG_SETUP_MEMORY_TAGS
28#define CONFIG_INITRD_TAG
29#define CONFIG_SKIP_LOWLEVEL_INIT
Wu, Josh9e336902013-04-16 23:42:44 +000030
Wu, Josh9e336902013-04-16 23:42:44 +000031/* general purpose I/O */
32#define CONFIG_AT91_GPIO
33
34/* serial console */
35#define CONFIG_ATMEL_USART
36#define CONFIG_USART_BASE ATMEL_BASE_DBGU
37#define CONFIG_USART_ID ATMEL_ID_SYS
Wu, Josh9e336902013-04-16 23:42:44 +000038
39/* LCD */
Wu, Josh9e336902013-04-16 23:42:44 +000040#define LCD_BPP LCD_COLOR16
41#define LCD_OUTPUT_BPP 24
42#define CONFIG_LCD_LOGO
43#define CONFIG_LCD_INFO
44#define CONFIG_LCD_INFO_BELOW_LOGO
Wu, Josh9e336902013-04-16 23:42:44 +000045#define CONFIG_ATMEL_HLCD
46#define CONFIG_ATMEL_LCD_RGB565
Wu, Josh9e336902013-04-16 23:42:44 +000047
Wu, Josh9e336902013-04-16 23:42:44 +000048
49/*
50 * BOOTP options
51 */
52#define CONFIG_BOOTP_BOOTFILESIZE
53#define CONFIG_BOOTP_BOOTPATH
54#define CONFIG_BOOTP_GATEWAY
55#define CONFIG_BOOTP_HOSTNAME
56
Wu, Josh9e336902013-04-16 23:42:44 +000057/*
58 * Command line configuration.
59 */
Wu, Josh9e336902013-04-16 23:42:44 +000060#define CONFIG_CMD_NAND
Wu, Josh9e336902013-04-16 23:42:44 +000061
62#define CONFIG_NR_DRAM_BANKS 1
63#define CONFIG_SYS_SDRAM_BASE 0x20000000
64#define CONFIG_SYS_SDRAM_SIZE 0x08000000
65
66/*
67 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
68 * leaving the correct space for initial global data structure above
69 * that address while providing maximum stack area below.
70 */
71# define CONFIG_SYS_INIT_SP_ADDR \
72 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
73
74/* DataFlash */
75#ifdef CONFIG_CMD_SF
76#define CONFIG_ATMEL_SPI
Wu, Josh9e336902013-04-16 23:42:44 +000077#define CONFIG_SF_DEFAULT_SPEED 30000000
78#define CONFIG_ENV_SPI_MODE SPI_MODE_3
79#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
80#endif
81
82/* NAND flash */
83#ifdef CONFIG_CMD_NAND
84#define CONFIG_NAND_ATMEL
85#define CONFIG_SYS_MAX_NAND_DEVICE 1
86#define CONFIG_SYS_NAND_BASE 0x40000000
87#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
88#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Andreas Bießmannac45bb12013-11-29 12:13:45 +010089#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
90#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
Wu, Josh9e336902013-04-16 23:42:44 +000091
92/* PMECC & PMERRLOC */
93#define CONFIG_ATMEL_NAND_HWECC
94#define CONFIG_ATMEL_NAND_HW_PMECC
95#define CONFIG_PMECC_CAP 2
96#define CONFIG_PMECC_SECTOR_SIZE 512
97#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
Bo Shence76f0a2013-06-26 10:48:53 +080098
99#define CONFIG_CMD_NAND_TRIMFFS
100
Wu, Josh9e336902013-04-16 23:42:44 +0000101#endif
102
103#define CONFIG_MTD_PARTITIONS
104#define CONFIG_MTD_DEVICE
105#define CONFIG_CMD_MTDPARTS
106#define MTDIDS_DEFAULT "nand0=atmel_nand"
107#define MTDPARTS_DEFAULT \
108 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
109 "256k(env),256k(env_redundant),256k(spare)," \
110 "512k(dtb),6M(kernel)ro,-(rootfs)"
111
112#define CONFIG_EXTRA_ENV_SETTINGS \
113 "console=console=ttyS0,115200\0" \
114 "mtdparts="MTDPARTS_DEFAULT"\0" \
115 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
116 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
117
118/* MMC */
119#ifdef CONFIG_CMD_MMC
Wu, Josh9e336902013-04-16 23:42:44 +0000120#define CONFIG_GENERIC_ATMEL_MCI
121#endif
122
Bo Shen16276222013-04-24 10:46:18 +0800123/* Ethernet */
124#define CONFIG_KS8851_MLL
125#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
126
Wu, Josh9e336902013-04-16 23:42:44 +0000127#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
128
129#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
130#define CONFIG_SYS_MEMTEST_END 0x26e00000
131
Bo Shend9bef0a2013-10-21 16:13:59 +0800132/* USB host */
133#ifdef CONFIG_CMD_USB
134#define CONFIG_USB_ATMEL
Bo Shendcd2f1a2013-10-21 16:14:00 +0800135#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Bo Shend9bef0a2013-10-21 16:13:59 +0800136#define CONFIG_USB_OHCI_NEW
137#define CONFIG_SYS_USB_OHCI_CPU_INIT
138#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
139#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
140#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Bo Shend9bef0a2013-10-21 16:13:59 +0800141#endif
142
Wu, Josh9e336902013-04-16 23:42:44 +0000143#ifdef CONFIG_SYS_USE_SPIFLASH
144
145/* bootstrap + u-boot + env + linux in dataflash on CS0 */
146#define CONFIG_ENV_IS_IN_SPI_FLASH
147#define CONFIG_ENV_OFFSET 0x5000
148#define CONFIG_ENV_SIZE 0x3000
149#define CONFIG_ENV_SECT_SIZE 0x1000
150#define CONFIG_BOOTCOMMAND \
151 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
152 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
153 "bootm 0x22000000"
154
155#elif defined(CONFIG_SYS_USE_NANDFLASH)
156
157/* bootstrap + u-boot + env + linux in nandflash */
158#define CONFIG_ENV_IS_IN_NAND
159#define CONFIG_ENV_OFFSET 0xc0000
160#define CONFIG_ENV_OFFSET_REDUND 0x100000
161#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
162#define CONFIG_BOOTCOMMAND \
163 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
164 "nand read 0x21000000 0x180000 0x080000;" \
165 "nand read 0x22000000 0x200000 0x400000;" \
166 "bootm 0x22000000 - 0x21000000"
167
168#else /* CONFIG_SYS_USE_MMC */
169
170/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh23ac62d2015-03-24 17:07:22 +0800171
172#ifdef CONFIG_ENV_IS_IN_MMC
173/* Use raw reserved sectors to save environment */
Wu, Josh9e336902013-04-16 23:42:44 +0000174#define CONFIG_ENV_OFFSET 0x2000
175#define CONFIG_ENV_SIZE 0x1000
176#define CONFIG_SYS_MMC_ENV_DEV 0
Wu, Josh23ac62d2015-03-24 17:07:22 +0800177#else
178/* Use file in FAT file to save environment */
179#define CONFIG_ENV_IS_IN_FAT
180#define CONFIG_FAT_WRITE
181#define FAT_ENV_INTERFACE "mmc"
182#define FAT_ENV_FILE "uboot.env"
183#define FAT_ENV_DEVICE_AND_PART "0"
184#define CONFIG_ENV_SIZE 0x4000
185#endif
186
Wu, Josh9e336902013-04-16 23:42:44 +0000187#define CONFIG_BOOTCOMMAND \
188 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
189 "fatload mmc 0:1 0x21000000 dtb;" \
190 "fatload mmc 0:1 0x22000000 uImage;" \
191 "bootm 0x22000000 - 0x21000000"
192
193#endif
194
Wu, Josh9e336902013-04-16 23:42:44 +0000195#define CONFIG_SYS_CBSIZE 256
196#define CONFIG_SYS_MAXARGS 16
Wu, Josh9e336902013-04-16 23:42:44 +0000197#define CONFIG_SYS_LONGHELP
198#define CONFIG_CMDLINE_EDITING
199#define CONFIG_AUTO_COMPLETE
Wu, Josh9e336902013-04-16 23:42:44 +0000200
201/*
202 * Size of malloc() pool
203 */
204#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Bo Shenff255e82015-03-27 14:23:36 +0800205
206/* SPL */
207#define CONFIG_SPL_FRAMEWORK
208#define CONFIG_SPL_TEXT_BASE 0x300000
209#define CONFIG_SPL_MAX_SIZE 0x6000
210#define CONFIG_SPL_STACK 0x308000
211
212#define CONFIG_SPL_BSS_START_ADDR 0x20000000
213#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
214#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
215#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
216
Bo Shenff255e82015-03-27 14:23:36 +0800217#define CONFIG_SPL_BOARD_INIT
218#define CONFIG_SYS_MONITOR_LEN (512 << 10)
219
220#define CONFIG_SYS_MASTER_CLOCK 132096000
221#define CONFIG_SYS_AT91_PLLA 0x20953f03
222#define CONFIG_SYS_MCKR 0x1301
223#define CONFIG_SYS_MCKR_CSS 0x1302
224
Bo Shenff255e82015-03-27 14:23:36 +0800225#ifdef CONFIG_SYS_USE_MMC
226#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
Bo Shenff255e82015-03-27 14:23:36 +0800227#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
228#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shenff255e82015-03-27 14:23:36 +0800229
230#elif CONFIG_SYS_USE_NANDFLASH
Bo Shenff255e82015-03-27 14:23:36 +0800231#define CONFIG_SPL_NAND_DRIVERS
232#define CONFIG_SPL_NAND_BASE
233#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
234#define CONFIG_SYS_NAND_5_ADDR_CYCLE
235#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
236#define CONFIG_SYS_NAND_PAGE_COUNT 64
237#define CONFIG_SYS_NAND_OOBSIZE 64
238#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
239#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
240#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
241
242#elif CONFIG_SYS_USE_SPIFLASH
Bo Shenff255e82015-03-27 14:23:36 +0800243#define CONFIG_SPL_SPI_LOAD
244#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
245
246#endif
Wu, Josh9e336902013-04-16 23:42:44 +0000247
248#endif