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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefano Babicdeb53482011-10-23 23:58:20 +00002/*
3 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
4 *
5 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
6 *
7 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
8 *
9 * Configuration for the flea3 board.
Stefano Babicdeb53482011-10-23 23:58:20 +000010 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
15#include <asm/arch/imx-regs.h>
16
17 /* High Level Configuration Options */
Stefano Babicdeb53482011-10-23 23:58:20 +000018#define CONFIG_MX35
Stefano Babicdeb53482011-10-23 23:58:20 +000019
Stefano Babicdeb53482011-10-23 23:58:20 +000020#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
21
22/* Set TEXT at the beginning of the NOR flash */
Stefano Babicdeb53482011-10-23 23:58:20 +000023
Stefano Babicdeb53482011-10-23 23:58:20 +000024/* This is required to setup the ESDC controller */
Stefano Babicdeb53482011-10-23 23:58:20 +000025
26#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27#define CONFIG_REVISION_TAG
28#define CONFIG_SETUP_MEMORY_TAGS
29#define CONFIG_INITRD_TAG
30
31/*
32 * Size of malloc() pool
33 */
34#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
35
36/*
37 * Hardware drivers
38 */
tremb089d032013-09-21 18:13:36 +020039#define CONFIG_SYS_I2C
40#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020041#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
42#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf8cb1012015-03-20 10:20:40 -070043#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
tremb089d032013-09-21 18:13:36 +020044#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
45#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
Stefano Babicdeb53482011-10-23 23:58:20 +000046
47/*
48 * UART (console)
49 */
Stefano Babic40f6fff2011-11-22 15:22:39 +010050#define CONFIG_MXC_UART_BASE UART3_BASE
Stefano Babicdeb53482011-10-23 23:58:20 +000051
Stefano Babicdeb53482011-10-23 23:58:20 +000052/*
53 * Command definition
54 */
Stefano Babicdeb53482011-10-23 23:58:20 +000055
Stefano Babicdeb53482011-10-23 23:58:20 +000056#define CONFIG_NET_RETRY_COUNT 100
57
Stefano Babicdeb53482011-10-23 23:58:20 +000058
Stefano Babicfda241d2011-11-25 09:08:36 +010059#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
Stefano Babicdeb53482011-10-23 23:58:20 +000060
Stefano Babicdeb53482011-10-23 23:58:20 +000061/*
62 * Ethernet on SOC (FEC)
63 */
Stefano Babicdeb53482011-10-23 23:58:20 +000064#define CONFIG_FEC_MXC
65#define IMX_FEC_BASE FEC_BASE_ADDR
Stefano Babicdeb53482011-10-23 23:58:20 +000066#define CONFIG_FEC_MXC_PHYADDR 0x1
67
Stefano Babicdeb53482011-10-23 23:58:20 +000068#define CONFIG_ARP_TIMEOUT 200UL
69
70/*
71 * Miscellaneous configurable options
72 */
Stefano Babicdeb53482011-10-23 23:58:20 +000073
Heiko Schocher45a3ad82016-10-17 15:51:35 +020074#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Stefano Babicdeb53482011-10-23 23:58:20 +000075/* Print Buffer Size */
Heiko Schocher45a3ad82016-10-17 15:51:35 +020076#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
Stefano Babicdeb53482011-10-23 23:58:20 +000077
Stefano Babicdeb53482011-10-23 23:58:20 +000078#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
79
Stefano Babicdeb53482011-10-23 23:58:20 +000080/*
81 * Physical Memory Map
82 */
Stefano Babicfda241d2011-11-25 09:08:36 +010083#define PHYS_SDRAM_1 CSD0_BASE_ADDR
Stefano Babicdeb53482011-10-23 23:58:20 +000084#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
85
Stefano Babicfda241d2011-11-25 09:08:36 +010086#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
Stefano Babicdeb53482011-10-23 23:58:20 +000087#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
88#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
89#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
90 GENERATED_GBL_DATA_SIZE)
91#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
92 CONFIG_SYS_GBL_DATA_OFFSET)
93
94/*
95 * MTD Command for mtdparts
96 */
Stefano Babicfda241d2011-11-25 09:08:36 +010097
Stefano Babicdeb53482011-10-23 23:58:20 +000098/*
99 * FLASH and environment organization
100 */
101#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
102#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
103#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
104/* Monitor at beginning of flash */
105#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
106#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
107
Stefano Babicdeb53482011-10-23 23:58:20 +0000108/* Address and size of Redundant Environment Sector */
Stefano Babicdeb53482011-10-23 23:58:20 +0000109
Stefano Babicdeb53482011-10-23 23:58:20 +0000110/*
111 * CFI FLASH driver setup
112 */
Stefano Babicdeb53482011-10-23 23:58:20 +0000113
114/* A non-standard buffered write algorithm */
Stefano Babicdeb53482011-10-23 23:58:20 +0000115
116/*
117 * NAND FLASH driver setup
118 */
Stefano Babicdeb53482011-10-23 23:58:20 +0000119#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
120#define CONFIG_SYS_MAX_NAND_DEVICE 1
121#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
122#define CONFIG_MXC_NAND_HWECC
123#define CONFIG_SYS_NAND_LARGEPAGE
124
125/*
126 * Default environment and default scripts
127 * to update uboot and load kernel
128 */
Stefano Babicdeb53482011-10-23 23:58:20 +0000129
Mario Six5bc05432018-03-28 14:38:20 +0200130#define CONFIG_HOSTNAME "flea3"
Stefano Babicdeb53482011-10-23 23:58:20 +0000131#define CONFIG_EXTRA_ENV_SETTINGS \
132 "netdev=eth0\0" \
133 "nfsargs=setenv bootargs root=/dev/nfs rw " \
134 "nfsroot=${serverip}:${rootpath}\0" \
135 "ramargs=setenv bootargs root=/dev/ram rw\0" \
136 "addip_sta=setenv bootargs ${bootargs} " \
137 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
138 ":${hostname}:${netdev}:off panic=1\0" \
139 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
140 "addip=if test -n ${ipdyn};then run addip_dyn;" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200141 "else run addip_sta;fi\0" \
Stefano Babicdeb53482011-10-23 23:58:20 +0000142 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
143 "addtty=setenv bootargs ${bootargs}" \
Stefano Babicfda241d2011-11-25 09:08:36 +0100144 " console=ttymxc2,${baudrate}\0" \
Stefano Babicdeb53482011-10-23 23:58:20 +0000145 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
Stefano Babicfda241d2011-11-25 09:08:36 +0100146 "loadaddr=80800000\0" \
147 "kernel_addr_r=80800000\0" \
Mario Six5bc05432018-03-28 14:38:20 +0200148 "hostname=" CONFIG_HOSTNAME "\0" \
149 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \
150 "ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0" \
Stefano Babicdeb53482011-10-23 23:58:20 +0000151 "flash_self=run ramargs addip addtty addmtd addmisc;" \
152 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
153 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
154 "bootm ${kernel_addr}\0" \
155 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
156 "run nfsargs addip addtty addmtd addmisc;" \
157 "bootm ${kernel_addr_r}\0" \
158 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
159 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
160 "net_self=if run net_self_load;then " \
161 "run ramargs addip addtty addmtd addmisc;" \
162 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
163 "else echo Images not loades;fi\0" \
Mario Six5bc05432018-03-28 14:38:20 +0200164 "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \
Stefano Babicdeb53482011-10-23 23:58:20 +0000165 "load=tftp ${loadaddr} ${u-boot}\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200166 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
Heiko Schocher45a3ad82016-10-17 15:51:35 +0200167 "update=protect off ${uboot_addr} +80000;" \
168 "erase ${uboot_addr} +80000;" \
Stefano Babicdeb53482011-10-23 23:58:20 +0000169 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
170 "upd=if run load;then echo Updating u-boot;if run update;" \
171 "then echo U-Boot updated;" \
172 "else echo Error updating u-boot !;" \
173 "echo Board without bootloader !!;" \
174 "fi;" \
175 "else echo U-Boot not downloaded..exiting;fi\0" \
176 "bootcmd=run net_nfs\0"
177
Stefano Babicdeb53482011-10-23 23:58:20 +0000178#endif /* __CONFIG_H */