blob: 4027f329d30bbafebe87014f19c09f66dc2c853e [file] [log] [blame]
Tom Rini855ff8e2018-05-18 17:54:39 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Jagan Teki1494cc82018-05-07 11:21:34 +05302/*
3 * Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it>
4 * Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it>
5 * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
6 *
7 * Configuration settings for the BTicion i.MX6DL Mamoj board.
Jagan Teki1494cc82018-05-07 11:21:34 +05308 */
9
10#ifndef __IMX6DL_MAMOJ_CONFIG_H
11#define __IMX6DL_MAMOJ_CONFIG_H
12
13#include <linux/sizes.h>
14#include "mx6_common.h"
15
16/* Size of malloc() pool */
Jagan Teki129ceda2018-05-07 11:21:38 +053017#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M)
Jagan Teki1494cc82018-05-07 11:21:34 +053018
19/* Total Size of Environment Sector */
Jagan Teki1494cc82018-05-07 11:21:34 +053020
Jagan Teki1494cc82018-05-07 11:21:34 +053021/* Environment */
22#ifndef CONFIG_ENV_IS_NOWHERE
23/* Environment in MMC */
Jagan Teki1494cc82018-05-07 11:21:34 +053024#endif
25
26#ifndef CONFIG_SPL_BUILD
27#define CONFIG_EXTRA_ENV_SETTINGS \
28 "scriptaddr=0x14000000\0" \
29 "fdt_addr_r=0x13000000\0" \
30 "kernel_addr_r=0x10008000\0" \
31 "fdt_high=0xffffffff\0" \
Jagan Teki129ceda2018-05-07 11:21:38 +053032 "dfu_alt_info_spl=spl raw 0x2 0x400\0" \
33 "dfu_alt_info_uboot=u-boot raw 0x8a 0x11400\0" \
Jagan Teki1494cc82018-05-07 11:21:34 +053034 BOOTENV
35
36#define BOOT_TARGET_DEVICES(func) \
37 func(MMC, mmc, 2)
38
39#include <config_distro_bootcmd.h>
40#endif
41
42/* UART */
43#define CONFIG_MXC_UART_BASE UART3_BASE
44
45/* MMC */
Jagan Teki1494cc82018-05-07 11:21:34 +053046
47/* Ethernet */
48#define CONFIG_FEC_MXC_PHYADDR 1
Jagan Teki1494cc82018-05-07 11:21:34 +053049
50/* USB */
51#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
52#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
53#define CONFIG_MXC_USB_FLAGS 0
54#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
55
Jagan Teki9e759ce2018-05-07 11:21:39 +053056/* Falcon */
57#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
58#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
Jagan Teki9e759ce2018-05-07 11:21:39 +053059#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000
Jagan Teki9e759ce2018-05-07 11:21:39 +053060
61/* MMC support: args@1MB kernel@2MB */
62#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
63#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
64#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
65
Jagan Teki1494cc82018-05-07 11:21:34 +053066/* Miscellaneous configurable options */
Jagan Teki1494cc82018-05-07 11:21:34 +053067
68#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
69#define CONFIG_SYS_HZ 1000
70
71/* Physical Memory Map */
Jagan Teki1494cc82018-05-07 11:21:34 +053072#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
73
74#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
75#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
76#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
77
78#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
79 GENERATED_GBL_DATA_SIZE)
80#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
81 CONFIG_SYS_INIT_SP_OFFSET)
82
83/* SPL */
84#include "imx6_spl.h"
85
86#endif /* __IMX6DL_MAMOJ_CONFIG_H */