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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ye Licf94a342016-02-01 10:41:32 +08002/*
3 * Copyright 2014 Freescale Semiconductor, Inc.
4 *
5 * Configuration settings for the Freescale i.MX6SX Sabreauto board.
Ye Licf94a342016-02-01 10:41:32 +08006 */
7
Ye Licf94a342016-02-01 10:41:32 +08008#ifndef __CONFIG_H
9#define __CONFIG_H
10
11#include "mx6_common.h"
12
Ye Licf94a342016-02-01 10:41:32 +080013/* Size of malloc() pool */
14#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
15
Ye Licf94a342016-02-01 10:41:32 +080016#define CONFIG_MXC_UART_BASE UART1_BASE
17
18#define CONFIG_EXTRA_ENV_SETTINGS \
19 "script=boot.scr\0" \
20 "image=zImage\0" \
21 "console=ttymxc0\0" \
22 "fdt_high=0xffffffff\0" \
23 "initrd_high=0xffffffff\0" \
24 "fdt_file=imx6sx-sabreauto.dtb\0" \
25 "fdt_addr=0x88000000\0" \
26 "boot_fdt=try\0" \
27 "ip_dyn=yes\0" \
28 "mmcdev=0\0" \
29 "mmcpart=1\0" \
30 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
31 "mmcargs=setenv bootargs console=${console},${baudrate} " \
32 "root=${mmcroot}\0" \
33 "loadbootscript=" \
34 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
35 "bootscript=echo Running bootscript from mmc ...; " \
36 "source\0" \
37 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
38 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
39 "mmcboot=echo Booting from mmc ...; " \
40 "run mmcargs; " \
41 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
42 "if run loadfdt; then " \
43 "bootz ${loadaddr} - ${fdt_addr}; " \
44 "else " \
45 "if test ${boot_fdt} = try; then " \
46 "bootz; " \
47 "else " \
48 "echo WARN: Cannot load the DT; " \
49 "fi; " \
50 "fi; " \
51 "else " \
52 "bootz; " \
53 "fi;\0" \
54 "netargs=setenv bootargs console=${console},${baudrate} " \
55 "root=/dev/nfs " \
56 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
57 "netboot=echo Booting from net ...; " \
58 "run netargs; " \
59 "if test ${ip_dyn} = yes; then " \
60 "setenv get_cmd dhcp; " \
61 "else " \
62 "setenv get_cmd tftp; " \
63 "fi; " \
64 "${get_cmd} ${image}; " \
65 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
66 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
67 "bootz ${loadaddr} - ${fdt_addr}; " \
68 "else " \
69 "if test ${boot_fdt} = try; then " \
70 "bootz; " \
71 "else " \
72 "echo WARN: Cannot load the DT; " \
73 "fi; " \
74 "fi; " \
75 "else " \
76 "bootz; " \
77 "fi;\0"
78
79#define CONFIG_BOOTCOMMAND \
80 "mmc dev ${mmcdev};" \
81 "mmc dev ${mmcdev}; if mmc rescan; then " \
82 "if run loadbootscript; then " \
83 "run bootscript; " \
84 "else " \
85 "if run loadimage; then " \
86 "run mmcboot; " \
87 "else run netboot; " \
88 "fi; " \
89 "fi; " \
90 "else run netboot; fi"
91
92/* Miscellaneous configurable options */
Ye Licf94a342016-02-01 10:41:32 +080093
Ye Licf94a342016-02-01 10:41:32 +080094/* Physical Memory Map */
Ye Licf94a342016-02-01 10:41:32 +080095#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
Ye Licf94a342016-02-01 10:41:32 +080096
97#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
98#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
99#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
100
101#define CONFIG_SYS_INIT_SP_OFFSET \
102 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
103#define CONFIG_SYS_INIT_SP_ADDR \
104 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
105
106/* MMC Configuration */
107#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
108
109/* I2C Configs */
Ye Licf94a342016-02-01 10:41:32 +0800110#define CONFIG_SYS_I2C_MXC
111#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
112#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
113#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
114#define CONFIG_SYS_I2C_SPEED 100000
115
Ye Licf94a342016-02-01 10:41:32 +0800116/* NAND stuff */
Ye Licf94a342016-02-01 10:41:32 +0800117#define CONFIG_SYS_MAX_NAND_DEVICE 1
118#define CONFIG_SYS_NAND_BASE 0x40000000
119#define CONFIG_SYS_NAND_5_ADDR_CYCLE
120#define CONFIG_SYS_NAND_ONFI_DETECTION
121
122/* DMA stuff, needed for GPMI/MXS NAND support */
Ye Licf94a342016-02-01 10:41:32 +0800123
124/* Network */
Ye Licf94a342016-02-01 10:41:32 +0800125
126#define CONFIG_FEC_MXC
Ye Licf94a342016-02-01 10:41:32 +0800127
128#define IMX_FEC_BASE ENET2_BASE_ADDR
129#define CONFIG_FEC_MXC_PHYADDR 0x0
130
131#define CONFIG_FEC_XCV_TYPE RGMII
132#define CONFIG_ETHPRIME "FEC"
133
Ye Licf94a342016-02-01 10:41:32 +0800134#ifdef CONFIG_CMD_USB
Ye Licf94a342016-02-01 10:41:32 +0800135#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
Ye Licf94a342016-02-01 10:41:32 +0800136#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
137#define CONFIG_MXC_USB_FLAGS 0
138#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
139#endif
140
Ye Licf94a342016-02-01 10:41:32 +0800141#define CONFIG_SYS_FSL_USDHC_NUM 2
Ye Licf94a342016-02-01 10:41:32 +0800142
Ye Licf94a342016-02-01 10:41:32 +0800143#endif /* __CONFIG_H */