Fabio Estevam | 0417ef1 | 2019-12-09 10:43:03 -0300 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2016 Freescale Semiconductor, Inc. |
| 4 | * |
| 5 | * Configuration settings for the Embedded Artists i.MX7ULP COM board. |
| 6 | */ |
| 7 | |
| 8 | #ifndef __MX7ULP_COM_CONFIG_H |
| 9 | #define __MX7ULP_COM_CONFIG_H |
| 10 | |
| 11 | #include <linux/sizes.h> |
| 12 | #include <asm/arch/imx-regs.h> |
| 13 | |
Ricardo Salveti | 8b71576 | 2021-09-12 17:32:57 +0300 | [diff] [blame] | 14 | #ifdef CONFIG_SPL |
| 15 | #include "imx7ulp_spl.h" |
| 16 | #endif |
| 17 | |
Fabio Estevam | 0417ef1 | 2019-12-09 10:43:03 -0300 | [diff] [blame] | 18 | /* Using ULP WDOG for reset */ |
| 19 | #define WDOG_BASE_ADDR WDG1_RBASE |
| 20 | |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 21 | #define CFG_SYS_HZ_CLOCK 1000000 /* Fixed at 1MHz from TSTMR */ |
Fabio Estevam | 0417ef1 | 2019-12-09 10:43:03 -0300 | [diff] [blame] | 22 | |
Fabio Estevam | 0417ef1 | 2019-12-09 10:43:03 -0300 | [diff] [blame] | 23 | /* UART */ |
| 24 | #define LPUART_BASE LPUART4_RBASE |
| 25 | |
Fabio Estevam | 0417ef1 | 2019-12-09 10:43:03 -0300 | [diff] [blame] | 26 | /* Physical Memory Map */ |
| 27 | |
| 28 | #define PHYS_SDRAM 0x60000000 |
Tom Rini | aa6e94d | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 29 | #define CFG_SYS_SDRAM_BASE PHYS_SDRAM |
Fabio Estevam | 0417ef1 | 2019-12-09 10:43:03 -0300 | [diff] [blame] | 30 | |
Tom Rini | 0613c36 | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 31 | #define CFG_EXTRA_ENV_SETTINGS \ |
Fabio Estevam | 0417ef1 | 2019-12-09 10:43:03 -0300 | [diff] [blame] | 32 | "image=zImage\0" \ |
| 33 | "console=ttyLP0\0" \ |
| 34 | "fdt_high=0xffffffff\0" \ |
| 35 | "initrd_high=0xffffffff\0" \ |
| 36 | "fdt_file=imx7ulp-com.dtb\0" \ |
| 37 | "fdt_addr=0x63000000\0" \ |
| 38 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ |
Tom Rini | de35b8f | 2021-12-11 14:55:52 -0500 | [diff] [blame] | 39 | "mmcpart=1\0" \ |
Peng Fan | adfaa42 | 2022-04-15 12:23:41 +0800 | [diff] [blame] | 40 | "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ |
Fabio Estevam | 0417ef1 | 2019-12-09 10:43:03 -0300 | [diff] [blame] | 41 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ |
| 42 | "root=${mmcroot}\0" \ |
| 43 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
| 44 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
| 45 | "mmcboot=echo Booting from mmc ...; " \ |
| 46 | "run mmcargs; " \ |
| 47 | "if run loadfdt; then " \ |
| 48 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
| 49 | "fi;\0" \ |
| 50 | |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 51 | #define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 52 | #define CFG_SYS_INIT_RAM_SIZE SZ_256K |
Fabio Estevam | 0417ef1 | 2019-12-09 10:43:03 -0300 | [diff] [blame] | 53 | |
Tom Rini | dd11fdc | 2022-12-04 10:04:56 -0500 | [diff] [blame] | 54 | #define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
Fabio Estevam | 0417ef1 | 2019-12-09 10:43:03 -0300 | [diff] [blame] | 55 | #endif /* __CONFIG_H */ |