blob: 22124c961f2718124dbea0e970c3dd0214074166 [file] [log] [blame]
wdenkbf9e3b32004-02-12 00:47:09 +00001/*
2 * Configuation settings for the Motorola MC5272C3 board.
3 *
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
wdenk4e5ca3e2003-12-08 01:34:36 +000024
wdenkbf9e3b32004-02-12 00:47:09 +000025/*
26 * board/config.h - configuration options, board specific
27 */
wdenk4e5ca3e2003-12-08 01:34:36 +000028
wdenkbf9e3b32004-02-12 00:47:09 +000029#ifndef _M5272C3_H
30#define _M5272C3_H
31
32/*
33 * High Level Configuration Options
34 * (easy to change)
35 */
TsiChungLiewf28e1bd2007-08-15 20:32:06 -050036#define CONFIG_MCF52x2 /* define processor family */
37#define CONFIG_M5272 /* define processor type */
wdenk4e5ca3e2003-12-08 01:34:36 +000038
TsiChungLiewf28e1bd2007-08-15 20:32:06 -050039#define CONFIG_MCFTMR
wdenk4e5ca3e2003-12-08 01:34:36 +000040
TsiChungLiewf28e1bd2007-08-15 20:32:06 -050041#define CONFIG_MCFUART
42#define CFG_UART_PORT (0)
TsiChung Liew79e07992008-08-15 16:50:07 +000043#define CONFIG_BAUDRATE 115200
44#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
wdenk4e5ca3e2003-12-08 01:34:36 +000045
TsiChungLiewf28e1bd2007-08-15 20:32:06 -050046#undef CONFIG_WATCHDOG
wdenkbf9e3b32004-02-12 00:47:09 +000047#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
48
TsiChungLiewf28e1bd2007-08-15 20:32:06 -050049#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
wdenkbf9e3b32004-02-12 00:47:09 +000050
51/* Configuration for environment
52 * Environment is embedded in u-boot in the second sector of the flash
53 */
54#ifndef CONFIG_MONITOR_IS_IN_RAM
55#define CFG_ENV_OFFSET 0x4000
56#define CFG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020057#define CONFIG_ENV_IS_IN_FLASH 1
wdenkbf9e3b32004-02-12 00:47:09 +000058#define CFG_ENV_IS_EMBEDDED 1
59#else
60#define CFG_ENV_ADDR 0xffe04000
61#define CFG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020062#define CONFIG_ENV_IS_IN_FLASH 1
wdenkbf9e3b32004-02-12 00:47:09 +000063#endif
64
Jon Loeliger8353e132007-07-08 14:14:17 -050065/*
Jon Loeliger659e2f62007-07-10 09:10:49 -050066 * BOOTP options
67 */
68#define CONFIG_BOOTP_BOOTFILESIZE
69#define CONFIG_BOOTP_BOOTPATH
70#define CONFIG_BOOTP_GATEWAY
71#define CONFIG_BOOTP_HOSTNAME
72
Jon Loeliger659e2f62007-07-10 09:10:49 -050073/*
Jon Loeliger8353e132007-07-08 14:14:17 -050074 * Command line configuration.
75 */
76#include <config_cmd_default.h>
77
78#define CONFIG_CMD_MII
TsiChungLiewf28e1bd2007-08-15 20:32:06 -050079#define CONFIG_CMD_NET
80#define CONFIG_CMD_PING
81#define CONFIG_CMD_MISC
82#define CONFIG_CMD_ELF
83#define CONFIG_CMD_FLASH
84#define CONFIG_CMD_MEMORY
Jon Loeliger8353e132007-07-08 14:14:17 -050085
86#undef CONFIG_CMD_LOADS
87#undef CONFIG_CMD_LOADB
88
wdenkbf9e3b32004-02-12 00:47:09 +000089#define CONFIG_BOOTDELAY 5
TsiChungLiewf28e1bd2007-08-15 20:32:06 -050090#define CONFIG_MCFFEC
91#ifdef CONFIG_MCFFEC
92# define CONFIG_NET_MULTI 1
93# define CONFIG_MII 1
TsiChung Liewd53cf6a2008-08-19 00:37:13 +060094# define CONFIG_MII_INIT 1
TsiChungLiewf28e1bd2007-08-15 20:32:06 -050095# define CFG_DISCOVER_PHY
96# define CFG_RX_ETH_BUFFER 8
97# define CFG_FAULT_ECHO_LINK_DOWN
98
99# define CFG_FEC0_PINMUX 0
100# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200101# define MCFFEC_TOUT_LOOP 50000
TsiChungLiewf28e1bd2007-08-15 20:32:06 -0500102/* If CFG_DISCOVER_PHY is not defined - hardcoded */
103# ifndef CFG_DISCOVER_PHY
104# define FECDUPLEX FULL
105# define FECSPEED _100BASET
106# else
107# ifndef CFG_FAULT_ECHO_LINK_DOWN
108# define CFG_FAULT_ECHO_LINK_DOWN
109# endif
110# endif /* CFG_DISCOVER_PHY */
111#endif
112
113#ifdef CONFIG_MCFFEC
114# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
115# define CONFIG_IPADDR 192.162.1.2
116# define CONFIG_NETMASK 255.255.255.0
117# define CONFIG_SERVERIP 192.162.1.1
118# define CONFIG_GATEWAYIP 192.162.1.1
119# define CONFIG_OVERWRITE_ETHADDR_ONCE
120#endif /* CONFIG_MCFFEC */
121
122#define CONFIG_HOSTNAME M5272C3
123#define CONFIG_EXTRA_ENV_SETTINGS \
124 "netdev=eth0\0" \
125 "loadaddr=10000\0" \
126 "u-boot=u-boot.bin\0" \
127 "load=tftp ${loadaddr) ${u-boot}\0" \
128 "upd=run load; run prog\0" \
129 "prog=prot off ffe00000 ffe3ffff;" \
130 "era ffe00000 ffe3ffff;" \
131 "cp.b ${loadaddr} ffe00000 ${filesize};"\
132 "save\0" \
133 ""
wdenkbf9e3b32004-02-12 00:47:09 +0000134
135#define CFG_PROMPT "-> "
TsiChungLiewf28e1bd2007-08-15 20:32:06 -0500136#define CFG_LONGHELP /* undef to save memory */
wdenkbf9e3b32004-02-12 00:47:09 +0000137
Jon Loeliger8353e132007-07-08 14:14:17 -0500138#if defined(CONFIG_CMD_KGDB)
TsiChungLiewf28e1bd2007-08-15 20:32:06 -0500139#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
wdenkbf9e3b32004-02-12 00:47:09 +0000140#else
TsiChungLiewf28e1bd2007-08-15 20:32:06 -0500141#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
wdenkbf9e3b32004-02-12 00:47:09 +0000142#endif
wdenkbf9e3b32004-02-12 00:47:09 +0000143
TsiChungLiewf28e1bd2007-08-15 20:32:06 -0500144#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
145#define CFG_MAXARGS 16 /* max number of command args */
146#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
wdenkbf9e3b32004-02-12 00:47:09 +0000147#define CFG_LOAD_ADDR 0x20000
wdenkbf9e3b32004-02-12 00:47:09 +0000148#define CFG_MEMTEST_START 0x400
149#define CFG_MEMTEST_END 0x380000
wdenkbf9e3b32004-02-12 00:47:09 +0000150#define CFG_HZ 1000
151#define CFG_CLK 66000000
152
153/*
154 * Low Level Configuration Settings
155 * (address mappings, register initial values, etc.)
156 * You should know what you are doing if you make changes here.
157 */
wdenkbf9e3b32004-02-12 00:47:09 +0000158#define CFG_MBAR 0x10000000 /* Register Base Addrs */
wdenkbf9e3b32004-02-12 00:47:09 +0000159#define CFG_SCR 0x0003;
160#define CFG_SPR 0xffff;
161
wdenkbf9e3b32004-02-12 00:47:09 +0000162/*-----------------------------------------------------------------------
163 * Definitions for initial stack pointer and data area (in DPRAM)
164 */
165#define CFG_INIT_RAM_ADDR 0x20000000
TsiChungLiewf28e1bd2007-08-15 20:32:06 -0500166#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
wdenkbf9e3b32004-02-12 00:47:09 +0000167#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
168#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
169#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
170
171/*-----------------------------------------------------------------------
172 * Start addresses for the final memory configuration
173 * (Set up by the startup code)
174 * Please note that CFG_SDRAM_BASE _must_ start at 0
175 */
176#define CFG_SDRAM_BASE 0x00000000
TsiChungLiewf28e1bd2007-08-15 20:32:06 -0500177#define CFG_SDRAM_SIZE 4 /* SDRAM size in MB */
wdenkbf9e3b32004-02-12 00:47:09 +0000178#define CFG_FLASH_BASE 0xffe00000
179
180#ifdef CONFIG_MONITOR_IS_IN_RAM
181#define CFG_MONITOR_BASE 0x20000
182#else
183#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
184#endif
185
186#define CFG_MONITOR_LEN 0x20000
187#define CFG_MALLOC_LEN (256 << 10)
188#define CFG_BOOTPARAMS_LEN 64*1024
189
190/*
191 * For booting Linux, the board info and command line data
192 * have to be in the first 8 MB of memory, since this is
193 * the maximum mapped by the Linux kernel during initialization ??
194 */
TsiChungLiewf28e1bd2007-08-15 20:32:06 -0500195#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
wdenkbf9e3b32004-02-12 00:47:09 +0000196
197/*-----------------------------------------------------------------------
198 * FLASH organization
199 */
TsiChungLiewf28e1bd2007-08-15 20:32:06 -0500200#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
201#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
wdenkbf9e3b32004-02-12 00:47:09 +0000202#define CFG_FLASH_ERASE_TOUT 1000
203
204/*-----------------------------------------------------------------------
205 * Cache Configuration
206 */
207#define CFG_CACHELINE_SIZE 16
208
209/*-----------------------------------------------------------------------
210 * Memory bank definitions
211 */
212#define CFG_BR0_PRELIM 0xFFE00201
213#define CFG_OR0_PRELIM 0xFFE00014
wdenkbf9e3b32004-02-12 00:47:09 +0000214#define CFG_BR1_PRELIM 0
215#define CFG_OR1_PRELIM 0
wdenkbf9e3b32004-02-12 00:47:09 +0000216#define CFG_BR2_PRELIM 0x30000001
217#define CFG_OR2_PRELIM 0xFFF80000
wdenkbf9e3b32004-02-12 00:47:09 +0000218#define CFG_BR3_PRELIM 0
219#define CFG_OR3_PRELIM 0
wdenkbf9e3b32004-02-12 00:47:09 +0000220#define CFG_BR4_PRELIM 0
221#define CFG_OR4_PRELIM 0
wdenkbf9e3b32004-02-12 00:47:09 +0000222#define CFG_BR5_PRELIM 0
223#define CFG_OR5_PRELIM 0
wdenkbf9e3b32004-02-12 00:47:09 +0000224#define CFG_BR6_PRELIM 0
225#define CFG_OR6_PRELIM 0
wdenkbf9e3b32004-02-12 00:47:09 +0000226#define CFG_BR7_PRELIM 0x00000701
227#define CFG_OR7_PRELIM 0xFFC0007C
228
229/*-----------------------------------------------------------------------
230 * Port configuration
231 */
232#define CFG_PACNT 0x00000000
233#define CFG_PADDR 0x0000
234#define CFG_PADAT 0x0000
TsiChungLiewf28e1bd2007-08-15 20:32:06 -0500235#define CFG_PBCNT 0x55554155 /* Ethernet/UART configuration */
wdenkbf9e3b32004-02-12 00:47:09 +0000236#define CFG_PBDDR 0x0000
237#define CFG_PBDAT 0x0000
238#define CFG_PDCNT 0x00000000
TsiChungLiewf28e1bd2007-08-15 20:32:06 -0500239#endif /* _M5272C3_H */