blob: 59743dfed01940da6832b248b532f753ba91eb32 [file] [log] [blame]
wdenk60fbe252003-04-08 23:25:21 +00001/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * This file contains the configuration parameters for the PURPLE board.
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31#define CONFIG_MIPS32 1 /* MIPS 5Kc CPU core */
32#define CONFIG_PURPLE 1 /* on a PURPLE Board */
33
34#define CPU_CLOCK_RATE 125000000 /* 125 MHz clock for the MIPS core */
35#define ASC_CLOCK_RATE 62500000 /* 62.5 MHz ASC clock */
36
37#define INFINEON_EBU_BOOTCFG 0xE0CC
38
39#define CONFIG_STACKSIZE (128 * 1024)
40
41#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
42
43#define CONFIG_BAUDRATE 19200
44
45/* valid baudrates */
46#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
47
48#define CONFIG_TIMESTAMP /* Print image info with timestamp */
49
50#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk32bf3d12008-03-03 12:16:44 +010051 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenk60fbe252003-04-08 23:25:21 +000052 "echo"
53
54#undef CONFIG_BOOTARGS
55
56#define CONFIG_EXTRA_ENV_SETTINGS \
57 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010058 "nfsroot=${serverip}:${rootpath}\0" \
wdenk60fbe252003-04-08 23:25:21 +000059 "ramargs=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010060 "addip=setenv bootargs ${bootargs} " \
61 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
62 ":${hostname}:${netdev}:off\0" \
63 "addmisc=setenv bootargs ${bootargs} " \
64 "console=ttyS0,${baudrate} " \
65 "ethaddr=${ethaddr} " \
wdenk60fbe252003-04-08 23:25:21 +000066 "panic=1\0" \
67 "flash_nfs=run nfsargs addip addmisc;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010068 "bootm ${kernel_addr}\0" \
wdenk60fbe252003-04-08 23:25:21 +000069 "flash_self=run ramargs addip addmisc;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010070 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
71 "net_nfs=tftp 80500000 ${bootfile};" \
wdenk60fbe252003-04-08 23:25:21 +000072 "run nfsargs addip addmisc;bootm\0" \
73 "rootpath=/opt/eldk/mips_5KC\0" \
74 "bootfile=/tftpboot/purple/uImage\0" \
75 "kernel_addr=B0040000\0" \
76 "ramdisk_addr=B0100000\0" \
77 "u-boot=/tftpboot/purple/u-boot.bin\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010078 "load=tftp 80500000 ${u-boot}\0" \
wdenk60fbe252003-04-08 23:25:21 +000079 "update=protect off 1:0-4;era 1:0-4;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010080 "cp.b 80500000 B0000000 ${filesize}\0" \
wdenk60fbe252003-04-08 23:25:21 +000081 ""
82#define CONFIG_BOOTCOMMAND "run flash_self"
83
Jon Loeliger26a34562007-07-04 22:33:17 -050084
85/*
Jon Loeliger079a1362007-07-10 10:12:10 -050086 * BOOTP options
87 */
88#define CONFIG_BOOTP_BOOTFILESIZE
89#define CONFIG_BOOTP_BOOTPATH
90#define CONFIG_BOOTP_GATEWAY
91#define CONFIG_BOOTP_HOSTNAME
92
93
94/*
Jon Loeliger26a34562007-07-04 22:33:17 -050095 * Command line configuration.
96 */
97#include <config_cmd_default.h>
98
99#define CONFIG_CMD_ELF
100
wdenk60fbe252003-04-08 23:25:21 +0000101
102#define CFG_SDRAM_BASE 0x80000000
103
104#define CFG_INIT_SP_OFFSET 0x400000
105
106#define CFG_MALLOC_LEN 128*1024
107
108#define CFG_BOOTPARAMS_LEN 128*1024
109
110/*
111 * Miscellaneous configurable options
112 */
113#define CFG_LONGHELP /* undef to save memory */
114#define CFG_PROMPT "PURPLE # " /* Monitor Command Prompt */
115#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
116#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
Shinya Kuribayashia55d4812008-06-05 22:29:00 +0900117#define CFG_MIPS_TIMER_FREQ (CPU_CLOCK_RATE/2)
118#define CFG_HZ 1000
wdenk60fbe252003-04-08 23:25:21 +0000119#define CFG_MAXARGS 16 /* max number of command args*/
120
121#define CFG_LOAD_ADDR 0x80500000 /* default load address */
122
123#define CFG_MEMTEST_START 0x80200000
124#define CFG_MEMTEST_END 0x80800000
125
126#define CONFIG_MISC_INIT_R
127
128/*-----------------------------------------------------------------------
129 * FLASH and environment organization
130 */
131#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
132#define CFG_MAX_FLASH_SECT (35) /* max number of sectors on one chip */
133
134#define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */
135
136/* The following #defines are needed to get flash environment right */
137#define CFG_MONITOR_BASE TEXT_BASE
138#define CFG_MONITOR_LEN (192 << 10)
139
140#define CFG_FLASH_BASE PHYS_FLASH_1
141
142/* timeout values are in ticks */
143#define CFG_FLASH_ERASE_TOUT (6 * CFG_HZ) /* Timeout for Flash Erase */
144#define CFG_FLASH_WRITE_TOUT (6 * CFG_HZ) /* Timeout for Flash Write */
145
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200146#define CONFIG_ENV_IS_IN_FLASH 1
wdenk60fbe252003-04-08 23:25:21 +0000147
148/* Address and size of Primary Environment Sector */
149#define CFG_ENV_ADDR 0xB0008000
150#define CFG_ENV_SIZE 0x4000
151
152#define CONFIG_FLASH_32BIT
153#define CONFIG_NR_DRAM_BANKS 1
154
155#define CONFIG_PLB2800_ETHER
156#define CONFIG_NET_MULTI
157
158/*-----------------------------------------------------------------------
159 * Cache Configuration
160 */
161#define CFG_DCACHE_SIZE 16384
162#define CFG_ICACHE_SIZE 16384
163#define CFG_CACHELINE_SIZE 32
164
165/*
166 * Temporary buffer for serial data until the real serial driver
167 * is initialised (memtest will destroy this buffer)
168 */
wdenk86d82762003-05-20 10:39:44 +0000169#define CFG_SCONSOLE_ADDR (CFG_SDRAM_BASE + CFG_INIT_SP_OFFSET - \
170 CFG_DCACHE_SIZE / 2)
171#define CFG_SCONSOLE_SIZE (CFG_DCACHE_SIZE / 4)
wdenk60fbe252003-04-08 23:25:21 +0000172
173#endif /* __CONFIG_H */