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Marian Balakowicz6e53e272006-03-14 15:59:25 +01001/*
2 * (C) Copyright 2001, 2002, 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 * Keith Outwater, keith_outwater@mvis.com`
5 * Steven Scholz, steven.scholz@imc-berlin.de
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26/*
27 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
28 * DS1374 Real Time Clock (RTC).
29 *
30 * based on ds1337.c
31 */
32
33#include <common.h>
34#include <command.h>
35#include <rtc.h>
36#include <i2c.h>
37
Jon Loeligera5938142007-07-09 18:10:50 -050038#if (defined(CONFIG_RTC_DS1374)) && defined(CONFIG_CMD_DATE)
Marian Balakowicz6e53e272006-03-14 15:59:25 +010039
40/*---------------------------------------------------------------------*/
41#undef DEBUG_RTC
42#define DEBUG_RTC
43
44#ifdef DEBUG_RTC
45#define DEBUGR(fmt,args...) printf(fmt ,##args)
46#else
47#define DEBUGR(fmt,args...)
48#endif
49/*---------------------------------------------------------------------*/
50
51#ifndef CFG_I2C_RTC_ADDR
52# define CFG_I2C_RTC_ADDR 0x68
53#endif
54
55#if defined(CONFIG_RTC_DS1374) && (CFG_I2C_SPEED > 400000)
56# error The DS1374 is specified up to 400kHz in fast mode!
57#endif
58
59/*
60 * RTC register addresses
61 */
62#define RTC_TOD_CNT_BYTE0_ADDR 0x00 /* TimeOfDay */
63#define RTC_TOD_CNT_BYTE1_ADDR 0x01
64#define RTC_TOD_CNT_BYTE2_ADDR 0x02
65#define RTC_TOD_CNT_BYTE3_ADDR 0x03
66
67#define RTC_WD_ALM_CNT_BYTE0_ADDR 0x04
68#define RTC_WD_ALM_CNT_BYTE1_ADDR 0x05
69#define RTC_WD_ALM_CNT_BYTE2_ADDR 0x06
70
71#define RTC_CTL_ADDR 0x07 /* RTC-CoNTrol-register */
72#define RTC_SR_ADDR 0x08 /* RTC-StatusRegister */
73#define RTC_TCS_DS_ADDR 0x09 /* RTC-TrickleChargeSelect DiodeSelect-register */
74
75#define RTC_CTL_BIT_AIE (1<<0) /* Bit 0 - Alarm Interrupt enable */
76#define RTC_CTL_BIT_RS1 (1<<1) /* Bit 1/2 - Rate Select square wave output */
77#define RTC_CTL_BIT_RS2 (1<<2) /* Bit 2/2 - Rate Select square wave output */
78#define RTC_CTL_BIT_WDSTR (1<<3) /* Bit 3 - Watchdog Reset Steering */
79#define RTC_CTL_BIT_BBSQW (1<<4) /* Bit 4 - Battery-Backed Square-Wave */
80#define RTC_CTL_BIT_WD_ALM (1<<5) /* Bit 5 - Watchdoc/Alarm Counter Select */
81#define RTC_CTL_BIT_WACE (1<<6) /* Bit 6 - Watchdog/Alarm Counter Enable WACE*/
82#define RTC_CTL_BIT_EN_OSC (1<<7) /* Bit 7 - Enable Oscilator */
83
84#define RTC_SR_BIT_AF 0x01 /* Bit 0 = Alarm Flag */
85#define RTC_SR_BIT_OSF 0x80 /* Bit 7 - Osc Stop Flag */
86
87typedef unsigned char boolean_t;
88
89#ifndef TRUE
90#define TRUE ((boolean_t)(0==0))
91#endif
92#ifndef FALSE
93#define FALSE (!TRUE)
94#endif
95
96const char RtcTodAddr[] = {
97 RTC_TOD_CNT_BYTE0_ADDR,
98 RTC_TOD_CNT_BYTE1_ADDR,
99 RTC_TOD_CNT_BYTE2_ADDR,
100 RTC_TOD_CNT_BYTE3_ADDR
101};
102
103static uchar rtc_read (uchar reg);
104static void rtc_write (uchar reg, uchar val, boolean_t set);
105static void rtc_write_raw (uchar reg, uchar val);
106
107/*
108 * Get the current time from the RTC
109 */
110void rtc_get (struct rtc_time *tm){
111
112 unsigned long time1, time2;
113 unsigned int limit;
114 unsigned char tmp;
115 unsigned int i;
116
117 /*
118 * Since the reads are being performed one byte at a time,
Wolfgang Denkcf48eb92006-04-16 10:51:58 +0200119 * there is a chance that a carry will occur during the read.
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100120 * To detect this, 2 reads are performed and compared.
121 */
122 limit = 10;
123 do {
124 i = 4;
125 time1 = 0;
126 while (i--) {
127 tmp = rtc_read(RtcTodAddr[i]);
128 time1 = (time1 << 8) | (tmp & 0xff);
129 }
130
131 i = 4;
132 time2 = 0;
133 while (i--) {
134 tmp = rtc_read(RtcTodAddr[i]);
135 time2 = (time2 << 8) | (tmp & 0xff);
136 }
137 } while ((time1 != time2) && limit--);
138
139 if (time1 != time2) {
140 printf("can't get consistent time from rtc chip\n");
141 }
142
143 DEBUGR ("Get RTC s since 1.1.1970: %d\n", time1);
144
145 to_tm(time1, tm); /* To Gregorian Date */
146
147 if (rtc_read(RTC_SR_ADDR) & RTC_SR_BIT_OSF)
148 printf ("### Warning: RTC oscillator has stopped\n");
149
150 DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
151 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
152 tm->tm_hour, tm->tm_min, tm->tm_sec);
153}
154
155/*
156 * Set the RTC
157 */
158void rtc_set (struct rtc_time *tmp){
159
160 unsigned long time;
161 unsigned i;
162
163 DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
164 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
165 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
166
167 if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
168 printf("WARNING: year should be between 1970 and 2069!\n");
169
170 time = mktime(tmp->tm_year, tmp->tm_mon,
171 tmp->tm_mday, tmp->tm_hour,
172 tmp->tm_min, tmp->tm_sec);
173
174 DEBUGR ("Set RTC s since 1.1.1970: %d (0x%02x)\n", time, time);
175
176 /* write to RTC_TOD_CNT_BYTEn_ADDR */
177 for (i = 0; i <= 3; i++) {
178 rtc_write_raw(RtcTodAddr[i], (unsigned char)(time & 0xff));
179 time = time >> 8;
180 }
181
182 /* Start clock */
183 rtc_write(RTC_CTL_ADDR, RTC_CTL_BIT_EN_OSC, FALSE);
184}
185
186/*
187 * Reset the RTC. We setting the date back to 1970-01-01.
188 * We also enable the oscillator output on the SQW/OUT pin and program
189 * it for 32,768 Hz output. Note that according to the datasheet, turning
190 * on the square wave output increases the current drain on the backup
191 * battery to something between 480nA and 800nA.
192 */
193void rtc_reset (void){
194
195 struct rtc_time tmp;
196
197 /* clear status flags */
198 rtc_write (RTC_SR_ADDR, (RTC_SR_BIT_AF|RTC_SR_BIT_OSF), FALSE); /* clearing OSF and AF */
199
200 /* Initialise DS1374 oriented to MPC8349E-ADS */
201 rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_EN_OSC
202 |RTC_CTL_BIT_WACE
203 |RTC_CTL_BIT_AIE), FALSE);/* start osc, disable WACE, clear AIE
204 - set to 0 */
205 rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_WD_ALM
206 |RTC_CTL_BIT_WDSTR
207 |RTC_CTL_BIT_RS1
208 |RTC_CTL_BIT_RS2
209 |RTC_CTL_BIT_BBSQW), TRUE);/* disable WD/ALM, WDSTR set to INT-pin,
210 set BBSQW and SQW to 32k
211 - set to 1 */
212 tmp.tm_year = 1970;
213 tmp.tm_mon = 1;
214 tmp.tm_mday= 1;
215 tmp.tm_hour = 0;
216 tmp.tm_min = 0;
217 tmp.tm_sec = 0;
218
219 rtc_set(&tmp);
220
221 printf("RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
222 tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
223 tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
224
225 rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR,0xAC, TRUE);
226 rtc_write(RTC_WD_ALM_CNT_BYTE1_ADDR,0xDE, TRUE);
227 rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR,0xAD, TRUE);
228}
229
230/*
231 * Helper functions
232 */
233static uchar rtc_read (uchar reg)
234{
235 return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg));
236}
237
238static void rtc_write (uchar reg, uchar val, boolean_t set)
239{
240 if (set == TRUE) {
241 val |= i2c_reg_read (CFG_I2C_RTC_ADDR, reg);
242 i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
243 } else {
244 val = i2c_reg_read (CFG_I2C_RTC_ADDR, reg) & ~val;
245 i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
246 }
247}
248
249static void rtc_write_raw (uchar reg, uchar val)
250{
251 i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
252}
Jon Loeliger068b60a2007-07-10 10:27:39 -0500253#endif