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Stephen Warrend5ebc932012-05-15 06:45:28 +00001/dts-v1/;
2
Tom Warren6c5be642013-02-21 12:31:27 +00003#include "tegra20.dtsi"
Stephen Warrend5ebc932012-05-15 06:45:28 +00004
5/ {
Allen Martin00a27492012-08-31 08:30:00 +00006 model = "NVIDIA Tegra20 Whistler evaluation board";
Stephen Warrend5ebc932012-05-15 06:45:28 +00007 compatible = "nvidia,whistler", "nvidia,tegra20";
8
9 aliases {
10 i2c0 = "/i2c@7000d000";
11 usb0 = "/usb@c5008000";
Stephen Warrend5ebc932012-05-15 06:45:28 +000012 };
13
14 memory {
15 device_type = "memory";
16 reg = < 0x00000000 0x20000000 >;
17 };
18
Stephen Warrend5ebc932012-05-15 06:45:28 +000019 serial@70006000 {
20 clock-frequency = < 216000000 >;
21 };
22
23 i2c@7000c000 {
24 status = "disabled";
25 };
26
27 i2c@7000c400 {
28 status = "disabled";
29 };
30
31 i2c@7000c500 {
32 status = "disabled";
33 };
34
35 i2c@7000d000 {
36 clock-frequency = <100000>;
37
38 pmic@3c {
39 compatible = "maxim,max8907b";
40 reg = <0x3c>;
41
42 clk_32k: clock {
43 compatible = "fixed-clock";
44 /*
45 * leave out for now due to CPP:
46 * #clock-cells = <0>;
47 */
48 clock-frequency = <32768>;
49 };
50 };
51 };
52
Stephen Warren56f42f82012-10-12 09:45:50 +000053 usb@c5000000 {
54 status = "disabled";
55 };
56
Stephen Warrend5ebc932012-05-15 06:45:28 +000057 usb@c5004000 {
58 status = "disabled";
59 };
60};