blob: 2f6e75187b1659999e68d4e0aafa4fcb659e3dfe [file] [log] [blame]
Aubrey.Li3f0606a2007-03-09 13:38:44 +08001/*
2 * U-boot - stamp.c STAMP board specific routines
3 *
4 * Copyright (c) 2005 blackfin.uclinux.org
5 *
6 * (C) Copyright 2000-2004
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#include <asm/mem_init.h>
Aubrey Li8440bb12007-03-12 00:25:14 +080030#include <asm/io.h>
Aubrey.Li3f0606a2007-03-09 13:38:44 +080031#include "bf533-stamp.h"
32
33#define STATUS_LED_OFF 0
34#define STATUS_LED_ON 1
35
36#ifdef CONFIG_SHOW_BOOT_PROGRESS
37# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
38#else
39# define SHOW_BOOT_PROGRESS(arg)
40#endif
41
42int checkboard(void)
43{
44#if (BFIN_CPU == ADSP_BF531)
45 printf("CPU: ADSP BF531 Rev.: 0.%d\n", *pCHIPID >> 28);
46#elif (BFIN_CPU == ADSP_BF532)
47 printf("CPU: ADSP BF532 Rev.: 0.%d\n", *pCHIPID >> 28);
48#else
49 printf("CPU: ADSP BF533 Rev.: 0.%d\n", *pCHIPID >> 28);
50#endif
51 printf("Board: ADI BF533 Stamp board\n");
52 printf(" Support: http://blackfin.uclinux.org/\n");
53 return 0;
54}
55
56long int initdram(int board_type)
57{
58 DECLARE_GLOBAL_DATA_PTR;
59#ifdef DEBUG
60 printf("SDRAM attributes:\n");
61 printf
62 (" tRCD:%d Cycles; tRP:%d Cycles; tRAS:%d Cycles; tWR:%d Cycles; "
63 "CAS Latency:%d cycles\n", (SDRAM_tRCD >> 15), (SDRAM_tRP >> 11),
64 (SDRAM_tRAS >> 6), (SDRAM_tWR >> 19), (SDRAM_CL >> 2));
65 printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE);
66 printf("Bank size = %d MB\n", 128);
67#endif
68 gd->bd->bi_memstart = CFG_SDRAM_BASE;
69 gd->bd->bi_memsize = CFG_MAX_RAM_SIZE;
70 return (gd->bd->bi_memsize);
71}
72
73void swap_to(int device_id)
74{
75
76 if (device_id == ETHERNET) {
77 *pFIO_DIR = PF0;
Aubrey Li8440bb12007-03-12 00:25:14 +080078 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +080079 *pFIO_FLAG_S = PF0;
Aubrey Li8440bb12007-03-12 00:25:14 +080080 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +080081 } else if (device_id == FLASH) {
82 *pFIO_DIR = (PF4 | PF3 | PF2 | PF1 | PF0);
83 *pFIO_FLAG_S = (PF4 | PF3 | PF2);
84 *pFIO_MASKA_D = (PF8 | PF6 | PF5);
85 *pFIO_MASKB_D = (PF7);
86 *pFIO_POLAR = (PF8 | PF6 | PF5);
87 *pFIO_EDGE = (PF8 | PF7 | PF6 | PF5);
88 *pFIO_INEN = (PF8 | PF7 | PF6 | PF5);
89 *pFIO_FLAG_D = (PF4 | PF3 | PF2);
Aubrey Li8440bb12007-03-12 00:25:14 +080090 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +080091 } else {
92 printf("Unknown bank to switch\n");
93 }
94
95 return;
96}
97
98#if defined(CONFIG_MISC_INIT_R)
99/* miscellaneous platform dependent initialisations */
100int misc_init_r(void)
101{
102 int i;
103 int cf_stat = 0;
104
105 /* Check whether CF card is inserted */
106 *pFIO_EDGE = FIO_EDGE_CF_BITS;
107 *pFIO_POLAR = FIO_POLAR_CF_BITS;
108 for (i = 0; i < 0x300; i++)
109 asm("nop;");
110
111 if ((*pFIO_FLAG_S) & CF_STAT_BITS) {
112 cf_stat = 0;
113 } else {
114 cf_stat = 1;
115 }
116
117 *pFIO_EDGE = FIO_EDGE_BITS;
118 *pFIO_POLAR = FIO_POLAR_BITS;
119
120 if (cf_stat) {
121 printf("Booting from COMPACT flash\n");
122
123 /* Set cycle time for CF */
124 *(volatile unsigned long *)ambctl1 = CF_AMBCTL1VAL;
125
126 for (i = 0; i < 0x1000; i++)
127 asm("nop;");
128 for (i = 0; i < 0x1000; i++)
129 asm("nop;");
130 for (i = 0; i < 0x1000; i++)
131 asm("nop;");
132
133 serial_setbrg();
134 ide_init();
135
136 setenv("bootargs", "");
137 setenv("bootcmd",
138 "fatload ide 0:1 0x1000000 uImage-stamp;bootm 0x1000000;bootm 0x20100000");
139 } else {
140 printf("Booting from FLASH\n");
141 }
142
143 return 0;
144}
145#endif
146
147#ifdef CONFIG_STAMP_CF
148
149void cf_outb(unsigned char val, volatile unsigned char *addr)
150{
151 /*
152 * Set PF1 PF0 respectively to 0 1 to divert address
153 * to the expansion memory banks
154 */
155 *pFIO_FLAG_S = CF_PF0;
156 *pFIO_FLAG_C = CF_PF1;
Aubrey Li8440bb12007-03-12 00:25:14 +0800157 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800158
159 *(addr) = val;
Aubrey Li8440bb12007-03-12 00:25:14 +0800160 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800161
162 /* Setback PF1 PF0 to 0 0 to address external
163 * memory banks */
164 *(volatile unsigned short *)pFIO_FLAG_C = CF_PF1_PF0;
Aubrey Li8440bb12007-03-12 00:25:14 +0800165 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800166}
167
168unsigned char cf_inb(volatile unsigned char *addr)
169{
170 volatile unsigned char c;
171
172 *pFIO_FLAG_S = CF_PF0;
173 *pFIO_FLAG_C = CF_PF1;
Aubrey Li8440bb12007-03-12 00:25:14 +0800174 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800175
176 c = *(addr);
Aubrey Li8440bb12007-03-12 00:25:14 +0800177 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800178
179 *pFIO_FLAG_C = CF_PF1_PF0;
Aubrey Li8440bb12007-03-12 00:25:14 +0800180 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800181
182 return c;
183}
184
185void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words)
186{
187 int i;
188
189 *pFIO_FLAG_S = CF_PF0;
190 *pFIO_FLAG_C = CF_PF1;
Aubrey Li8440bb12007-03-12 00:25:14 +0800191 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800192
193 for (i = 0; i < words; i++) {
194 *(sect_buf + i) = *(addr);
Aubrey Li8440bb12007-03-12 00:25:14 +0800195 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800196 }
197
198 *pFIO_FLAG_C = CF_PF1_PF0;
Aubrey Li8440bb12007-03-12 00:25:14 +0800199 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800200}
201
202void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)
203{
204 int i;
205
206 *pFIO_FLAG_S = CF_PF0;
207 *pFIO_FLAG_C = CF_PF1;
Aubrey Li8440bb12007-03-12 00:25:14 +0800208 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800209
210 for (i = 0; i < words; i++) {
211 *(addr) = *(sect_buf + i);
Aubrey Li8440bb12007-03-12 00:25:14 +0800212 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800213 }
214
215 *pFIO_FLAG_C = CF_PF1_PF0;
Aubrey Li8440bb12007-03-12 00:25:14 +0800216 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800217}
218#endif
219
220void stamp_led_set(int LED1, int LED2, int LED3)
221{
222 *pFIO_INEN &= ~(PF2 | PF3 | PF4);
223 *pFIO_DIR |= (PF2 | PF3 | PF4);
224
225 if (LED1 == STATUS_LED_OFF)
226 *pFIO_FLAG_S = PF2;
227 else
228 *pFIO_FLAG_C = PF2;
229 if (LED2 == STATUS_LED_OFF)
230 *pFIO_FLAG_S = PF3;
231 else
232 *pFIO_FLAG_C = PF3;
233 if (LED3 == STATUS_LED_OFF)
234 *pFIO_FLAG_S = PF4;
235 else
236 *pFIO_FLAG_C = PF4;
Aubrey Li8440bb12007-03-12 00:25:14 +0800237 sync();
Aubrey.Li3f0606a2007-03-09 13:38:44 +0800238}
239
240void show_boot_progress(int status)
241{
242 switch (status) {
243 case 1:
244 stamp_led_set(STATUS_LED_OFF, STATUS_LED_OFF, STATUS_LED_ON);
245 break;
246 case 2:
247 stamp_led_set(STATUS_LED_OFF, STATUS_LED_ON, STATUS_LED_OFF);
248 break;
249 case 3:
250 stamp_led_set(STATUS_LED_OFF, STATUS_LED_ON, STATUS_LED_ON);
251 break;
252 case 4:
253 stamp_led_set(STATUS_LED_ON, STATUS_LED_OFF, STATUS_LED_OFF);
254 break;
255 case 5:
256 case 6:
257 stamp_led_set(STATUS_LED_ON, STATUS_LED_OFF, STATUS_LED_ON);
258 break;
259 case 7:
260 case 8:
261 stamp_led_set(STATUS_LED_ON, STATUS_LED_ON, STATUS_LED_OFF);
262 break;
263 case 9:
264 case 10:
265 case 11:
266 case 12:
267 case 13:
268 case 14:
269 case 15:
270 stamp_led_set(STATUS_LED_OFF, STATUS_LED_OFF, STATUS_LED_OFF);
271 break;
272 default:
273 stamp_led_set(STATUS_LED_ON, STATUS_LED_ON, STATUS_LED_ON);
274 break;
275 }
276}