Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Kever Yang | aa89b55 | 2016-08-12 17:58:12 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2016 Rockchip Electronics Co., Ltd |
Kever Yang | aa89b55 | 2016-08-12 17:58:12 +0800 | [diff] [blame] | 4 | */ |
| 5 | #include <asm/io.h> |
Kever Yang | 15f09a1 | 2019-03-28 11:01:23 +0800 | [diff] [blame] | 6 | #include <asm/arch-rockchip/hardware.h> |
Kever Yang | 070e48b | 2019-03-29 09:09:03 +0800 | [diff] [blame] | 7 | #include <asm/arch-rockchip/grf_rk3288.h> |
Kever Yang | aa89b55 | 2016-08-12 17:58:12 +0800 | [diff] [blame] | 8 | |
Kever Yang | 070e48b | 2019-03-29 09:09:03 +0800 | [diff] [blame] | 9 | #define GRF_BASE 0xff770000 |
Kever Yang | aa89b55 | 2016-08-12 17:58:12 +0800 | [diff] [blame] | 10 | |
| 11 | int arch_cpu_init(void) |
| 12 | { |
Kever Yang | ccab9e7 | 2019-07-09 21:58:43 +0800 | [diff] [blame^] | 13 | #ifdef CONFIG_SPL_BUILD |
| 14 | configure_l2ctlr(); |
| 15 | #else |
Kever Yang | aa89b55 | 2016-08-12 17:58:12 +0800 | [diff] [blame] | 16 | /* We do some SoC one time setting here. */ |
Kever Yang | 070e48b | 2019-03-29 09:09:03 +0800 | [diff] [blame] | 17 | struct rk3288_grf * const grf = (void *)GRF_BASE; |
Kever Yang | aa89b55 | 2016-08-12 17:58:12 +0800 | [diff] [blame] | 18 | |
| 19 | /* Use rkpwm by default */ |
Kever Yang | 070e48b | 2019-03-29 09:09:03 +0800 | [diff] [blame] | 20 | rk_setreg(&grf->soc_con2, 1 << 0); |
Kever Yang | ccab9e7 | 2019-07-09 21:58:43 +0800 | [diff] [blame^] | 21 | #endif |
Kever Yang | aa89b55 | 2016-08-12 17:58:12 +0800 | [diff] [blame] | 22 | |
| 23 | return 0; |
| 24 | } |
Kever Yang | e83e885 | 2019-03-29 09:09:04 +0800 | [diff] [blame] | 25 | |
| 26 | #ifdef CONFIG_DEBUG_UART_BOARD_INIT |
| 27 | void board_debug_uart_init(void) |
| 28 | { |
| 29 | /* Enable early UART on the RK3288 */ |
| 30 | struct rk3288_grf * const grf = (void *)GRF_BASE; |
| 31 | |
| 32 | rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT | |
| 33 | GPIO7C6_MASK << GPIO7C6_SHIFT, |
| 34 | GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT | |
| 35 | GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); |
| 36 | } |
| 37 | #endif |