blob: 4f72350138ef9133dfa058f6d9f37da19a3636bc [file] [log] [blame]
Lars Poeschel1c1b7c32013-01-11 00:53:31 +00001/*
2 * pcm051.h
3 *
4 * Phytec phyCORE-AM335x (pcm051) boards information header
5 *
6 * Copyright (C) 2013 Lemonage Software GmbH
7 * Author Lars Poeschel <poeschel@lemonage.de>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
12 *
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#ifndef __CONFIG_PCM051_H
20#define __CONFIG_PCM051_H
21
Matwey V. Kornilovb640b462014-07-26 18:48:45 +040022#include <configs/ti_am335x_common.h>
Lars Poeschel1c1b7c32013-01-11 00:53:31 +000023
Lars Poeschel1c1b7c32013-01-11 00:53:31 +000024#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Lars Poeschel1c1b7c32013-01-11 00:53:31 +000025#define CONFIG_MACH_TYPE MACH_TYPE_PCM051
26
Lars Poeschel1c1b7c32013-01-11 00:53:31 +000027/* set to negative value for no autoboot */
Lars Poeschel1c1b7c32013-01-11 00:53:31 +000028#define CONFIG_EXTRA_ENV_SETTINGS \
29 "loadaddr=0x80007fc0\0" \
30 "fdtaddr=0x80000000\0" \
31 "rdaddr=0x81000000\0" \
32 "bootfile=uImage\0" \
33 "fdtfile=pcm051.dtb\0" \
34 "console=ttyO0,115200n8\0" \
35 "optargs=\0" \
36 "mmcdev=0\0" \
37 "mmcroot=/dev/mmcblk0p2 ro\0" \
38 "mmcrootfstype=ext4 rootwait\0" \
39 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
40 "ramrootfstype=ext2\0" \
41 "mmcargs=setenv bootargs console=${console} " \
42 "${optargs} " \
43 "root=${mmcroot} " \
44 "rootfstype=${mmcrootfstype}\0" \
45 "bootenv=uEnv.txt\0" \
matwey.kornilov@gmail.com1ee9c6c2014-12-27 22:10:44 +030046 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
47 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
48 "source ${loadaddr}\0" \
Lars Poeschel1c1b7c32013-01-11 00:53:31 +000049 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
50 "importbootenv=echo Importing environment from mmc ...; " \
51 "env import -t $loadaddr $filesize\0" \
52 "ramargs=setenv bootargs console=${console} " \
53 "${optargs} " \
54 "root=${ramroot} " \
55 "rootfstype=${ramrootfstype}\0" \
56 "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
57 "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
58 "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
59 "mmcboot=echo Booting from mmc ...; " \
60 "run mmcargs; " \
61 "bootm ${loadaddr}\0" \
62 "ramboot=echo Booting from ramdisk ...; " \
63 "run ramargs; " \
64 "bootm ${loadaddr}\0" \
65
66#define CONFIG_BOOTCOMMAND \
67 "mmc dev ${mmcdev}; if mmc rescan; then " \
68 "echo SD/MMC found on device ${mmcdev};" \
matwey.kornilov@gmail.com1ee9c6c2014-12-27 22:10:44 +030069 "if run loadbootscript; then " \
70 "run bootscript;" \
71 "else " \
72 "if run loadbootenv; then " \
73 "echo Loaded environment from ${bootenv};" \
74 "run importbootenv;" \
75 "fi;" \
76 "if test -n $uenvcmd; then " \
77 "echo Running uenvcmd ...;" \
78 "run uenvcmd;" \
79 "fi;" \
80 "if run loaduimage; then " \
81 "run mmcboot;" \
82 "fi;" \
83 "fi ;" \
Lars Poeschel1c1b7c32013-01-11 00:53:31 +000084 "fi;" \
85
86/* Clock Defines */
87#define V_OSCK 25000000 /* Clock output from T2 */
88#define V_SCLK (V_OSCK)
89
Lars Poeschel1c1b7c32013-01-11 00:53:31 +000090/*
91 * memtest works on 8 MB in DRAM after skipping 32MB from
92 * start addr of ram disk
93 */
Tom Rini73feefd2013-08-09 11:22:13 -040094#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + (64 << 20))
Lars Poeschel1c1b7c32013-01-11 00:53:31 +000095#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
96 + (8 * 1024 * 1024))
97
Lars Poeschel1c1b7c32013-01-11 00:53:31 +000098#define CONFIG_SF_DEFAULT_SPEED 24000000
99
Lars Poeschel1c1b7c32013-01-11 00:53:31 +0000100/* NS16550 Configuration */
Lars Poeschel1c1b7c32013-01-11 00:53:31 +0000101#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
102#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
103#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
104#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
105#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
106#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
107
108/* I2C Configuration */
Lars Poeschel1c1b7c32013-01-11 00:53:31 +0000109#define CONFIG_ENV_EEPROM_IS_ON_I2C
110#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
111#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
Lars Poeschel1c1b7c32013-01-11 00:53:31 +0000112
Lars Poeschel1c1b7c32013-01-11 00:53:31 +0000113#define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \
1144800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
115
SRICHARAN R47c6ea02013-04-24 00:41:25 +0000116/* CPU */
Lars Poeschel1c1b7c32013-01-11 00:53:31 +0000117
Matwey V. Kornilovb640b462014-07-26 18:48:45 +0400118#ifdef CONFIG_SPI_BOOT
Lars Poeschel1c1b7c32013-01-11 00:53:31 +0000119#define CONFIG_SPL_SPI_LOAD
Lars Poeschel1c1b7c32013-01-11 00:53:31 +0000120#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
121#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
Lars Poeschel1c1b7c32013-01-11 00:53:31 +0000122#endif
123
124/*
125 * USB configuration
126 */
Lars Poeschel1c1b7c32013-01-11 00:53:31 +0000127#define CONFIG_AM335X_USB0
128#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
129#define CONFIG_AM335X_USB1
130#define CONFIG_AM335X_USB1_MODE MUSB_HOST
131
Lars Poeschel1c1b7c32013-01-11 00:53:31 +0000132#define CONFIG_PHY_SMSC
133
134#endif /* ! __CONFIG_PCM051_H */