blob: 653c71b9482c4d5b489b275dd2e06d04ab7b9754 [file] [log] [blame]
Simon Glass6c6d88e2019-12-06 21:41:53 -07001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2019 Google LLC
4 */
5
6#define LOG_CATEGORY UCLASS_ACPI_PMC
7
8#include <common.h>
9#include <acpi_s3.h>
10#include <dm.h>
11#include <log.h>
12#include <asm/io.h>
13#include <power/acpi_pmc.h>
14
15enum {
16 PM1_STS = 0x00,
17 PM1_EN = 0x02,
18 PM1_CNT = 0x04,
19
20 GPE0_STS = 0x20,
21 GPE0_EN = 0x30,
22};
23
24struct tco_regs {
25 u32 tco_rld;
26 u32 tco_sts;
27 u32 tco1_cnt;
28 u32 tco_tmr;
29};
30
31enum {
32 TCO_STS_TIMEOUT = 1 << 3,
33 TCO_STS_SECOND_TO_STS = 1 << 17,
34 TCO1_CNT_HLT = 1 << 11,
35};
36
37static void pmc_fill_pm_reg_info(struct udevice *dev)
38{
39 struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
40 int i;
41
42 upriv->pm1_sts = inw(upriv->acpi_base + PM1_STS);
43 upriv->pm1_en = inw(upriv->acpi_base + PM1_EN);
44 upriv->pm1_cnt = inw(upriv->acpi_base + PM1_CNT);
45
46 log_debug("pm1_sts: %04x pm1_en: %04x pm1_cnt: %08x\n",
47 upriv->pm1_sts, upriv->pm1_en, upriv->pm1_cnt);
48
49 for (i = 0; i < GPE0_REG_MAX; i++) {
50 upriv->gpe0_sts[i] = inl(upriv->acpi_base + GPE0_STS + i * 4);
51 upriv->gpe0_en[i] = inl(upriv->acpi_base + GPE0_EN + i * 4);
52 log_debug("gpe0_sts[%d]: %08x gpe0_en[%d]: %08x\n", i,
53 upriv->gpe0_sts[i], i, upriv->gpe0_en[i]);
54 }
55}
56
57int pmc_disable_tco_base(ulong tco_base)
58{
59 struct tco_regs *regs = (struct tco_regs *)tco_base;
60
61 debug("tco_base %lx = %x\n", (ulong)&regs->tco1_cnt, TCO1_CNT_HLT);
62 setio_32(&regs->tco1_cnt, TCO1_CNT_HLT);
63
64 return 0;
65}
66
67int pmc_init(struct udevice *dev)
68{
69 const struct acpi_pmc_ops *ops = acpi_pmc_get_ops(dev);
70 int ret;
71
72 pmc_fill_pm_reg_info(dev);
73 if (!ops->init)
74 return -ENOSYS;
75
76 ret = ops->init(dev);
77 if (ret)
78 return log_msg_ret("Failed to init pmc", ret);
79
80#ifdef DEBUG
81 pmc_dump_info(dev);
82#endif
83
84 return 0;
85}
86
87int pmc_prev_sleep_state(struct udevice *dev)
88{
89 struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
90 const struct acpi_pmc_ops *ops = acpi_pmc_get_ops(dev);
91 int prev_sleep_state = ACPI_S0; /* Default to S0 */
92
93 if (upriv->pm1_sts & WAK_STS) {
94 switch (acpi_sleep_from_pm1(upriv->pm1_cnt)) {
95 case ACPI_S3:
96 if (IS_ENABLED(HAVE_ACPI_RESUME))
97 prev_sleep_state = ACPI_S3;
98 break;
99 case ACPI_S5:
100 prev_sleep_state = ACPI_S5;
101 break;
102 default:
103 break;
104 }
105
106 /* Clear SLP_TYP */
107 outl(upriv->pm1_cnt & ~SLP_TYP, upriv->acpi_base + PM1_CNT);
108 }
109
110 if (!ops->prev_sleep_state)
111 return prev_sleep_state;
112
113 return ops->prev_sleep_state(dev, prev_sleep_state);
114}
115
116int pmc_disable_tco(struct udevice *dev)
117{
118 const struct acpi_pmc_ops *ops = acpi_pmc_get_ops(dev);
119
120 pmc_fill_pm_reg_info(dev);
121 if (!ops->disable_tco)
122 return -ENOSYS;
123
124 return ops->disable_tco(dev);
125}
126
127int pmc_global_reset_set_enable(struct udevice *dev, bool enable)
128{
129 const struct acpi_pmc_ops *ops = acpi_pmc_get_ops(dev);
130
131 if (!ops->global_reset_set_enable)
132 return -ENOSYS;
133
134 return ops->global_reset_set_enable(dev, enable);
135}
136
137void pmc_dump_info(struct udevice *dev)
138{
139 struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
140 int i;
141
142 printf("Device: %s\n", dev->name);
143 printf("ACPI base %x, pmc_bar0 %p, pmc_bar2 %p, gpe_cfg %p\n",
144 upriv->acpi_base, upriv->pmc_bar0, upriv->pmc_bar2,
145 upriv->gpe_cfg);
146 printf("pm1_sts: %04x pm1_en: %04x pm1_cnt: %08x\n",
147 upriv->pm1_sts, upriv->pm1_en, upriv->pm1_cnt);
148
149 for (i = 0; i < GPE0_REG_MAX; i++) {
150 printf("gpe0_sts[%d]: %08x gpe0_en[%d]: %08x\n", i,
151 upriv->gpe0_sts[i], i, upriv->gpe0_en[i]);
152 }
153
154 printf("prsts: %08x\n", upriv->prsts);
155 printf("tco_sts: %04x %04x\n", upriv->tco1_sts, upriv->tco2_sts);
156 printf("gen_pmcon1: %08x gen_pmcon2: %08x gen_pmcon3: %08x\n",
157 upriv->gen_pmcon1, upriv->gen_pmcon2, upriv->gen_pmcon3);
158}
159
160int pmc_ofdata_to_uc_platdata(struct udevice *dev)
161{
162 struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
163 int ret;
164
165 ret = dev_read_u32(dev, "gpe0-dwx-mask", &upriv->gpe0_dwx_mask);
166 if (ret)
167 return log_msg_ret("no gpe0-dwx-mask", ret);
168 ret = dev_read_u32(dev, "gpe0-dwx-shift-base",
169 &upriv->gpe0_dwx_shift_base);
170 if (ret)
171 return log_msg_ret("no gpe0-dwx-shift-base", ret);
172 ret = dev_read_u32(dev, "gpe0-sts", &upriv->gpe0_sts_reg);
173 if (ret)
174 return log_msg_ret("no gpe0-sts", ret);
175 upriv->gpe0_sts_reg += upriv->acpi_base;
176 ret = dev_read_u32(dev, "gpe0-en", &upriv->gpe0_en_reg);
177 if (ret)
178 return log_msg_ret("no gpe0-en", ret);
179 upriv->gpe0_en_reg += upriv->acpi_base;
180
181 return 0;
182}
183
184UCLASS_DRIVER(acpi_pmc) = {
185 .id = UCLASS_ACPI_PMC,
186 .name = "power-mgr",
187 .per_device_auto_alloc_size = sizeof(struct acpi_pmc_upriv),
188};