Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2012 Atmel Corporation |
| 4 | * |
| 5 | * Configuation settings for the AT91SAM9X5EK board. |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_H__ |
| 9 | #define __CONFIG_H__ |
| 10 | |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 11 | /* ARM asynchronous clock */ |
| 12 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
| 13 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 14 | |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 15 | /* general purpose I/O */ |
| 16 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 17 | |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 18 | /* |
Tom Rini | 8850c5d | 2017-05-12 22:33:27 -0400 | [diff] [blame] | 19 | * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) |
Richard Genoud | b030e73 | 2012-11-29 23:18:34 +0000 | [diff] [blame] | 20 | * NB: in this case, USB 1.1 devices won't be recognized. |
| 21 | */ |
| 22 | |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 23 | /* SDRAM */ |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 24 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 25 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ |
| 26 | |
| 27 | #define CONFIG_SYS_INIT_SP_ADDR \ |
Wenyou Yang | 74631b6 | 2017-04-18 14:51:54 +0800 | [diff] [blame] | 28 | (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 29 | |
| 30 | /* DataFlash */ |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 31 | |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 32 | /* NAND flash */ |
| 33 | #ifdef CONFIG_CMD_NAND |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 34 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 35 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
| 36 | #define CONFIG_SYS_NAND_DBW_8 1 |
| 37 | /* our ALE is AD21 */ |
| 38 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 39 | /* our CLE is AD22 */ |
| 40 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
| 41 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 |
| 42 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 43 | #endif |
| 44 | |
Richard Genoud | b030e73 | 2012-11-29 23:18:34 +0000 | [diff] [blame] | 45 | /* USB */ |
| 46 | #ifdef CONFIG_CMD_USB |
Tom Rini | 8850c5d | 2017-05-12 22:33:27 -0400 | [diff] [blame] | 47 | #ifndef CONFIG_USB_EHCI_HCD |
Bo Shen | dcd2f1a | 2013-10-21 16:14:00 +0800 | [diff] [blame] | 48 | #define CONFIG_USB_ATMEL |
| 49 | #define CONFIG_USB_ATMEL_CLK_SEL_UPLL |
Richard Genoud | b030e73 | 2012-11-29 23:18:34 +0000 | [diff] [blame] | 50 | #define CONFIG_USB_OHCI_NEW |
| 51 | #define CONFIG_SYS_USB_OHCI_CPU_INIT |
| 52 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI |
| 53 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5" |
| 54 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 |
| 55 | #endif |
Richard Genoud | b030e73 | 2012-11-29 23:18:34 +0000 | [diff] [blame] | 56 | #endif |
| 57 | |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 58 | #ifdef CONFIG_NAND_BOOT |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 59 | /* bootstrap + u-boot + env + linux in nandflash */ |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 60 | #elif defined(CONFIG_SPI_BOOT) |
Bo Shen | 1d7442e | 2012-08-19 20:32:24 +0000 | [diff] [blame] | 61 | /* bootstrap + u-boot + env + linux in spi flash */ |
Bo Shen | 961ffc7 | 2012-12-06 21:37:04 +0000 | [diff] [blame] | 62 | #elif defined(CONFIG_SYS_USE_DATAFLASH) |
| 63 | /* bootstrap + u-boot + env + linux in data flash */ |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 64 | #endif |
| 65 | |
Bo Shen | d85e891 | 2015-03-27 14:23:35 +0800 | [diff] [blame] | 66 | /* SPL */ |
Bo Shen | d85e891 | 2015-03-27 14:23:35 +0800 | [diff] [blame] | 67 | #define CONFIG_SPL_MAX_SIZE 0x6000 |
| 68 | #define CONFIG_SPL_STACK 0x308000 |
| 69 | |
| 70 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 |
| 71 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 |
| 72 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 |
| 73 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 |
| 74 | |
Bo Shen | d85e891 | 2015-03-27 14:23:35 +0800 | [diff] [blame] | 75 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) |
| 76 | |
| 77 | #define CONFIG_SYS_MASTER_CLOCK 132096000 |
| 78 | #define CONFIG_SYS_AT91_PLLA 0x20c73f03 |
| 79 | #define CONFIG_SYS_MCKR 0x1301 |
| 80 | #define CONFIG_SYS_MCKR_CSS 0x1302 |
| 81 | |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 82 | #ifdef CONFIG_SD_BOOT |
Bo Shen | d85e891 | 2015-03-27 14:23:35 +0800 | [diff] [blame] | 83 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 84 | #endif |
Bo Shen | d85e891 | 2015-03-27 14:23:35 +0800 | [diff] [blame] | 85 | |
Bo Shen | f7fa2f3 | 2012-07-05 17:21:46 +0000 | [diff] [blame] | 86 | #endif |