blob: 47c55ba4a0f17fc046ba445367e84b67628c592f [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Bo Shenf7fa2f32012-07-05 17:21:46 +00002/*
3 * Copyright (C) 2012 Atmel Corporation
4 *
5 * Configuation settings for the AT91SAM9X5EK board.
Bo Shenf7fa2f32012-07-05 17:21:46 +00006 */
7
8#ifndef __CONFIG_H__
9#define __CONFIG_H__
10
Bo Shenf7fa2f32012-07-05 17:21:46 +000011/* ARM asynchronous clock */
12#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
13#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
Bo Shenf7fa2f32012-07-05 17:21:46 +000014
Bo Shenf7fa2f32012-07-05 17:21:46 +000015/* general purpose I/O */
16#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
Bo Shenf7fa2f32012-07-05 17:21:46 +000017
Bo Shenf7fa2f32012-07-05 17:21:46 +000018/*
Tom Rini8850c5d2017-05-12 22:33:27 -040019 * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
Richard Genoudb030e732012-11-29 23:18:34 +000020 * NB: in this case, USB 1.1 devices won't be recognized.
21 */
22
Bo Shenf7fa2f32012-07-05 17:21:46 +000023/* SDRAM */
Bo Shenf7fa2f32012-07-05 17:21:46 +000024#define CONFIG_SYS_SDRAM_BASE 0x20000000
25#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
26
27#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yang74631b62017-04-18 14:51:54 +080028 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Bo Shenf7fa2f32012-07-05 17:21:46 +000029
30/* DataFlash */
Bo Shenf7fa2f32012-07-05 17:21:46 +000031
Bo Shenf7fa2f32012-07-05 17:21:46 +000032/* NAND flash */
33#ifdef CONFIG_CMD_NAND
Bo Shenf7fa2f32012-07-05 17:21:46 +000034#define CONFIG_SYS_MAX_NAND_DEVICE 1
35#define CONFIG_SYS_NAND_BASE 0x40000000
36#define CONFIG_SYS_NAND_DBW_8 1
37/* our ALE is AD21 */
38#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
39/* our CLE is AD22 */
40#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
41#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
42#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
Tom Rini8f1a80e2017-07-28 21:31:42 -040043#endif
44
Richard Genoudb030e732012-11-29 23:18:34 +000045/* USB */
46#ifdef CONFIG_CMD_USB
Tom Rini8850c5d2017-05-12 22:33:27 -040047#ifndef CONFIG_USB_EHCI_HCD
Bo Shendcd2f1a2013-10-21 16:14:00 +080048#define CONFIG_USB_ATMEL
49#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
Richard Genoudb030e732012-11-29 23:18:34 +000050#define CONFIG_USB_OHCI_NEW
51#define CONFIG_SYS_USB_OHCI_CPU_INIT
52#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
53#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5"
54#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
55#endif
Richard Genoudb030e732012-11-29 23:18:34 +000056#endif
57
Wenyou Yang55415432017-09-14 11:07:44 +080058#ifdef CONFIG_NAND_BOOT
Bo Shenf7fa2f32012-07-05 17:21:46 +000059/* bootstrap + u-boot + env + linux in nandflash */
Wenyou Yang55415432017-09-14 11:07:44 +080060#elif defined(CONFIG_SPI_BOOT)
Bo Shen1d7442e2012-08-19 20:32:24 +000061/* bootstrap + u-boot + env + linux in spi flash */
Bo Shen961ffc72012-12-06 21:37:04 +000062#elif defined(CONFIG_SYS_USE_DATAFLASH)
63/* bootstrap + u-boot + env + linux in data flash */
Bo Shenf7fa2f32012-07-05 17:21:46 +000064#endif
65
Bo Shend85e8912015-03-27 14:23:35 +080066/* SPL */
Bo Shend85e8912015-03-27 14:23:35 +080067#define CONFIG_SPL_MAX_SIZE 0x6000
68#define CONFIG_SPL_STACK 0x308000
69
70#define CONFIG_SPL_BSS_START_ADDR 0x20000000
71#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
72#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
73#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
74
Bo Shend85e8912015-03-27 14:23:35 +080075#define CONFIG_SYS_MONITOR_LEN (512 << 10)
76
77#define CONFIG_SYS_MASTER_CLOCK 132096000
78#define CONFIG_SYS_AT91_PLLA 0x20c73f03
79#define CONFIG_SYS_MCKR 0x1301
80#define CONFIG_SYS_MCKR_CSS 0x1302
81
Wenyou Yang55415432017-09-14 11:07:44 +080082#ifdef CONFIG_SD_BOOT
Bo Shend85e8912015-03-27 14:23:35 +080083#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Wenyou Yang55415432017-09-14 11:07:44 +080084#endif
Bo Shend85e8912015-03-27 14:23:35 +080085
Bo Shenf7fa2f32012-07-05 17:21:46 +000086#endif