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Siva Durga Prasad Paladugu0b54a9d2015-06-10 15:50:57 +05301if ARCH_ZYNQMP
2
Tien Fong Chee0c3a9ed2019-01-23 14:20:03 +08003config SPL_FS_FAT
Simon Glassae56db52016-09-12 23:18:38 -06004 default y
5
Simon Glass77d2f7f2016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glass1646eba2016-09-12 23:18:42 -06009config SPL_LIBDISK_SUPPORT
10 default y
11
Simon Glasscc4288e2016-09-12 23:18:43 -060012config SPL_LIBGENERIC_SUPPORT
13 default y
14
Simon Glass103c5f12021-08-08 12:20:09 -060015config SPL_MMC
Alexandru Gagniuc0dcf18c2017-04-04 10:02:58 -070016 default y if MMC_SDHCI_ZYNQ
Simon Glass1fdf7c62016-09-12 23:18:44 -060017
Simon Glass2a736062021-08-08 12:20:12 -060018config SPL_SERIAL
Simon Glasse00f76c2016-09-12 23:18:56 -060019 default y
20
Simon Glasse404ade2016-09-12 23:18:57 -060021config SPL_SPI_FLASH_SUPPORT
22 default y if ZYNQ_QSPI
23
Simon Glassea2ca7e2021-08-08 12:20:14 -060024config SPL_SPI
Simon Glassf35ed9e2016-09-12 23:18:58 -060025 default y if ZYNQ_QSPI
26
Michal Simek84c72042015-01-15 10:01:51 +010027config SYS_BOARD
Liam Beguin18141942021-10-20 11:25:18 -040028 string "Board name"
Michal Simek84c72042015-01-15 10:01:51 +010029 default "zynqmp"
30
31config SYS_VENDOR
Mike Looijmansef4cab92017-01-03 09:47:52 +010032 string "Vendor name"
Michal Simek84c72042015-01-15 10:01:51 +010033 default "xilinx"
34
35config SYS_SOC
36 default "zynqmp"
37
38config SYS_CONFIG_NAME
Michal Simeka1108da2016-03-18 18:21:36 +010039 string "Board configuration name"
40 default "xilinx_zynqmp"
41 help
42 This option contains information about board configuration name.
43 Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
44 will be used for board configuration.
Michal Simek84c72042015-01-15 10:01:51 +010045
Siva Durga Prasad Paladugue042d362017-07-13 19:01:11 +053046config SYS_MEM_RSVD_FOR_MMU
47 bool "Reserve memory for MMU Table"
48 help
49 If defined this option is used to setup different space for
50 MMU table than the one which will be allocated during
51 relocation.
52
Mike Looijmans3b646082016-09-20 11:37:24 +020053config BOOT_INIT_FILE
54 string "boot.bin init register filename"
Michal Simek9cf9da72016-12-16 13:00:26 +010055 depends on SPL
Mike Looijmans3b646082016-09-20 11:37:24 +020056 default ""
57 help
58 Add register writes to boot.bin format (max 256 pairs).
59 Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
60
Michal Simekc85a6b72016-10-21 12:58:17 +020061config PMUFW_INIT_FILE
62 string "PMU firmware"
63 depends on SPL
64 default ""
65 help
66 Include external PMUFW (Platform Management Unit FirmWare) to
67 a Xilinx bootable image (boot.bin).
68
Luca Ceresolic28a9cf2019-05-21 18:06:43 +020069config ZYNQMP_SPL_PM_CFG_OBJ_FILE
70 string "PMU firmware configuration object to load at runtime by SPL"
71 depends on SPL
72 help
73 Path to a binary PMU firmware configuration object to be linked
74 into U-Boot SPL and loaded at runtime into the PMU firmware.
75
76 The ZynqMP Power Management Unit (PMU) needs a configuration
77 object for most SoC peripherals to work. To have it loaded by
78 U-Boot SPL set here the file name (absolute path or relative to
79 the top source tree) of your configuration, which must be a
80 binary blob. It will be linked in the SPL binary and loaded
81 into the PMU firmware by U-Boot SPL during board
82 initialization.
83
84 Leave this option empty if your PMU firmware has a hard-coded
85 configuration object or you are loading it by any other means.
86
Siva Durga Prasad Paladugu16fa00a2015-08-04 13:03:26 +053087config ZYNQMP_USB
88 bool "Configure ZynqMP USB"
89
Siva Durga Prasad Paladugu3b644a32018-01-12 15:35:46 +053090config ZYNQMP_NO_DDR
91 bool "Disable DDR MMU mapping"
92 help
93 This option configures MMU with no DDR to avoid speculative
94 access to DDR memory where DDR is not present.
95
Jorge Ramirez-Ortiz01c77142021-06-13 20:55:53 +020096config SPL_ZYNQMP_DRAM_ECC_INIT
97 bool "Initialize DRAM ECC"
98 depends on SPL
99 help
100 This option initializes all memory to 0xdeadbeef. Must be set if your
101 memory is of ECC type.
102
103config SPL_ZYNQMP_DRAM_BANK1_BASE
104 depends on SPL_ZYNQMP_DRAM_ECC_INIT
105 hex "DRAM Bank1 address"
106 default 0x00000000
107 help
108 Start address of DRAM ECC bank1
109
110config SPL_ZYNQMP_DRAM_BANK1_LEN
111 depends on SPL_ZYNQMP_DRAM_ECC_INIT
112 hex "DRAM Bank1 size"
113 default 0x80000000
114 help
115 Size in bytes of the DRAM ECC bank1
116
117config SPL_ZYNQMP_DRAM_BANK2_BASE
118 depends on SPL_ZYNQMP_DRAM_ECC_INIT
119 hex "DRAM Bank2 address"
120 default 0x800000000
121 help
122 Start address of DRAM ECC bank2
123
124config SPL_ZYNQMP_DRAM_BANK2_LEN
125 depends on SPL_ZYNQMP_DRAM_ECC_INIT
126 hex "DRAM Bank2 size"
127 default 0x0
128 help
129 Size in bytes of the DRAM ECC bank2. A null size takes no action.
130
Simon Glass04e38902016-07-05 17:10:13 -0600131config SYS_MALLOC_F_LEN
132 default 0x600
133
Siva Durga Prasad Paladugu189bec42017-07-13 19:01:10 +0530134config DEFINE_TCM_OCM_MMAP
135 bool "Define TCM and OCM memory in MMU Table"
Siva Durga Prasad Paladugu89401482017-08-01 16:24:50 +0530136 default y if MP
Siva Durga Prasad Paladugu189bec42017-07-13 19:01:10 +0530137 help
138 This option if enabled defines the TCM and OCM memory and its
139 memory attributes in MMU table entry.
140
Michal Simekfd1b6352017-07-12 13:21:27 +0200141config ZYNQMP_PSU_INIT_ENABLED
142 bool "Include psu_init"
143 help
144 Include psu_init to full u-boot. SPL include psu_init by default.
145
Michal Simek7f491d72016-08-30 16:17:27 +0200146config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
147 bool "Overwrite SPL bootmode"
148 depends on SPL
149 help
150 Overwrite bootmode selected via boot mode pins to tell SPL what should
151 be the next boot device.
152
Jorge Ramirez-Ortiz398a74a2021-10-13 15:48:00 +0200153config SPL_ZYNQMP_RESTORE_JTAG
154 bool "Restore JTAG"
155 depends on SPL
156 help
157 Booting SPL in secure mode causes the CSU to disable the JTAG interface
158 even if no eFuses were burnt. This option restores the interface if
159 possible.
160
Vipul Kumar5dc5a532018-02-28 15:53:28 +0530161config ZYNQ_SDHCI_MAX_FREQ
162 default 200000000
163
Michal Simek7f491d72016-08-30 16:17:27 +0200164config SPL_ZYNQMP_ALT_BOOTMODE
165 hex
166 default 0x0 if JTAG_MODE
167 default 0x1 if QSPI_MODE_24BIT
168 default 0x2 if QSPI_MODE_32BIT
169 default 0x3 if SD_MODE
170 default 0x4 if NAND_MODE
171 default 0x5 if SD_MODE1
172 default 0x6 if EMMC_MODE
173 default 0x7 if USB_MODE
Michal Simek26610812016-10-26 09:24:32 +0200174 default 0xa if SW_USBHOST_MODE
175 default 0xb if SW_SATA_MODE
Michal Simek011f0c42017-02-15 09:41:53 +0100176 default 0xe if SD1_LSHFT_MODE
Michal Simek7f491d72016-08-30 16:17:27 +0200177
178choice
179 prompt "Boot mode"
Michal Simeke3672402016-08-30 16:17:27 +0200180 depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
Ulf Magnussone7563c22018-01-30 14:02:01 +0100181 default JTAG_MODE
Michal Simek7f491d72016-08-30 16:17:27 +0200182
183config JTAG_MODE
184 bool "JTAG_MODE"
185
186config QSPI_MODE_24BIT
187 bool "QSPI_MODE_24BIT"
188
189config QSPI_MODE_32BIT
190 bool "QSPI_MODE_32BIT"
191
192config SD_MODE
193 bool "SD_MODE"
194
195config SD_MODE1
196 bool "SD_MODE1"
197
198config NAND_MODE
199 bool "NAND_MODE"
200
201config EMMC_MODE
202 bool "EMMC_MODE"
203
204config USB_MODE
205 bool "USB"
206
Michal Simek26610812016-10-26 09:24:32 +0200207config SW_USBHOST_MODE
208 bool "SW USBHOST_MODE"
209
210config SW_SATA_MODE
211 bool "SW SATA_MODE"
212
Michal Simek011f0c42017-02-15 09:41:53 +0100213config SD1_LSHFT_MODE
214 bool "SD1_LSHFT_MODE"
215
Michal Simek7f491d72016-08-30 16:17:27 +0200216endchoice
Simon Glass04e38902016-07-05 17:10:13 -0600217
Michal Simek6ba36c02020-08-27 15:34:11 +0200218source "board/xilinx/Kconfig"
219source "board/xilinx/zynqmp/Kconfig"
220
Michal Simek84c72042015-01-15 10:01:51 +0100221endif