| Felix Brack | 85ab045 | 2018-01-23 18:27:22 +0100 | [diff] [blame] | 1 | /* |
| 2 | * board.h |
| 3 | * |
| 4 | * EETS GmbH PDU001 board information header |
| 5 | * |
| 6 | * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/ |
| 7 | * |
| 8 | * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ |
| 9 | * |
| 10 | * SPDX-License-Identifier: GPL-2.0+ |
| 11 | */ |
| 12 | |
| 13 | #ifndef _BOARD_H_ |
| 14 | #define _BOARD_H_ |
| 15 | |
| 16 | /* |
| 17 | * We have two pin mux functions that must exist. First we need I2C0 to |
| 18 | * access the TPS65910 PMIC located on the M2 computing module. |
| 19 | * Second, if we want low-level debugging or a early UART (ie. before the |
| 20 | * pin controller driver is running), we need one of the UART ports UART0 to |
| 21 | * UART5 (usually UART3 since it is wired to K2). |
| 22 | * In case of I2C0 access we explicitly don't rely on the the ROM but we could |
| 23 | * do so as we use the primary mode (mode 0) for I2C0. |
| 24 | * All other multiplexing and pin configuration is done by the DT once it |
| 25 | * gets parsed by the pin controller driver. |
| 26 | * However we relay on the ROM to configure the pins of MMC0 (eMMC) as well |
| 27 | * as MMC1 (microSD card-cage) since these are our boot devices. |
| 28 | */ |
| 29 | void enable_uart0_pin_mux(void); |
| 30 | void enable_uart1_pin_mux(void); |
| 31 | void enable_uart2_pin_mux(void); |
| 32 | void enable_uart3_pin_mux(void); |
| 33 | void enable_uart4_pin_mux(void); |
| 34 | void enable_uart5_pin_mux(void); |
| 35 | void enable_uart_pin_mux(u32 addr); |
| 36 | void enable_i2c0_pin_mux(void); |
| 37 | |
| 38 | #endif |