blob: ed88b4184413f26be8b9c835e9d262419dc5e3ea [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Kumar Galad1712362010-07-15 16:49:03 -05002/*
Jerry Huangd621da02011-01-06 23:42:19 -06003 * Copyright 2009-2011 Freescale Semiconductor, Inc.
Kumar Galad1712362010-07-15 16:49:03 -05004 */
5
6/*
7 * P4080 DS board configuration file
Scott Wood3e978f52012-08-14 10:14:51 +00008 * Also supports P4040 DS
Kumar Galad1712362010-07-15 16:49:03 -05009 */
Kumar Galac6d33902011-08-31 09:50:13 -050010#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */
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Kumar Galac6d33902011-08-31 09:50:13 -050012#define CONFIG_PCIE3
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Shaohui Xie70672a22013-11-08 10:46:44 +080014#define CONFIG_SYS_SATA_MAX_DEVICE 2
Shaohui Xie70672a22013-11-08 10:46:44 +080015#define CONFIG_LBA48
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Timur Tabi11860d82012-10-05 09:48:53 +000017#define CONFIG_SYS_SRIO
18#define CONFIG_SRIO1 /* SRIO port 1 */
19#define CONFIG_SRIO2 /* SRIO port 2 */
Liu Gangc8b28152013-05-07 16:30:46 +080020#define CONFIG_SRIO_PCIE_BOOT_MASTER
Kumar Gala0ce84372010-09-30 15:47:16 -050021#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 ref clk freq */
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Kumar Galad1712362010-07-15 16:49:03 -050023#include "corenet_ds.h"