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John Otkend4024bb2007-07-26 17:49:11 +02001/*
2 * (C) Copyright 2000-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2005-2007
6 * Beijing UD Technology Co., Ltd., taihusupport@amcc.com
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26#include <common.h>
27#include <command.h>
28#include <asm/processor.h>
29#include <asm/io.h>
30#include <spi.h>
Ben Warren10efa022008-08-31 20:37:00 -070031#include <netdev.h>
John Otkend4024bb2007-07-26 17:49:11 +020032#include <asm/gpio.h>
33
34extern int lcd_init(void);
35
36/*
37 * board_early_init_f
38 */
39int board_early_init_f(void)
40{
41 lcd_init();
42
43 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
44 mtdcr(uicer, 0x00000000); /* disable all ints */
45 mtdcr(uiccr, 0x00000000);
46 mtdcr(uicpr, 0xFFFF7F00); /* set int polarities */
47 mtdcr(uictr, 0x00000000); /* set int trigger levels */
48 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
49 mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
50
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020051 mtebc(pb3ap, CONFIG_SYS_EBC_PB3AP); /* memory bank 3 (CPLD_LCM) initialization */
52 mtebc(pb3cr, CONFIG_SYS_EBC_PB3CR);
John Otkend4024bb2007-07-26 17:49:11 +020053
Stefan Roese779e9752007-08-14 14:44:41 +020054 /*
55 * Configure CPC0_PCI to enable PerWE as output
56 * and enable the internal PCI arbiter
57 */
58 mtdcr(cpc0_pci, CPC0_PCI_SPE | CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
59
John Otkend4024bb2007-07-26 17:49:11 +020060 return 0;
61}
62
63/*
64 * Check Board Identity:
65 */
66int checkboard(void)
67{
68 char *s = getenv("serial#");
69
70 puts("Board: Taihu - AMCC PPC405EP Evaluation Board");
71
72 if (s != NULL) {
73 puts(", serial# ");
74 puts(s);
75 }
76 putc('\n');
77
78 return 0;
79}
80
John Otkend4024bb2007-07-26 17:49:11 +020081static int do_sw_stat(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[])
82{
83 char stat;
84 int i;
85
86 stat = in_8((u8 *) CPLD_REG0_ADDR);
87 printf("SW2 status: ");
88 for (i=0; i<4; i++) /* 4-position */
89 printf("%d:%s ", i, stat & (0x08 >> i)?"on":"off");
90 printf("\n");
91 return 0;
92}
93
94U_BOOT_CMD (
95 sw2_stat, 1, 1, do_sw_stat,
96 "sw2_stat - show status of switch 2\n",
97 NULL
98 );
99
100static int do_led_ctl(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[])
101{
102 int led_no;
103
104 if (argc != 3) {
Peter Tyser79621bc2009-01-27 18:03:11 -0600105 cmd_usage(cmd_tp);
John Otkend4024bb2007-07-26 17:49:11 +0200106 return -1;
107 }
108
109 led_no = simple_strtoul(argv[1], NULL, 16);
110 if (led_no != 1 && led_no != 2) {
Peter Tyser79621bc2009-01-27 18:03:11 -0600111 cmd_usage(cmd_tp);
John Otkend4024bb2007-07-26 17:49:11 +0200112 return -1;
113 }
114
115 if (strcmp(argv[2],"off") == 0x0) {
116 if (led_no == 1)
117 gpio_write_bit(30, 1);
118 else
119 gpio_write_bit(31, 1);
120 } else if (strcmp(argv[2],"on") == 0x0) {
121 if (led_no == 1)
122 gpio_write_bit(30, 0);
123 else
124 gpio_write_bit(31, 0);
125 } else {
Peter Tyser79621bc2009-01-27 18:03:11 -0600126 cmd_usage(cmd_tp);
John Otkend4024bb2007-07-26 17:49:11 +0200127 return -1;
128 }
129
130 return 0;
131}
132
133U_BOOT_CMD (
134 led_ctl, 3, 1, do_led_ctl,
135 "led_ctl - make led 1 or 2 on or off\n",
136 "<led_no> <on/off> - make led <led_no> on/off,\n"
137 "\tled_no is 1 or 2\t"
138 );
139
140#define SPI_CS_GPIO0 0
141#define SPI_SCLK_GPIO14 14
142#define SPI_DIN_GPIO15 15
143#define SPI_DOUT_GPIO16 16
144
145void spi_scl(int bit)
146{
147 gpio_write_bit(SPI_SCLK_GPIO14, bit);
148}
149
150void spi_sda(int bit)
151{
152 gpio_write_bit(SPI_DOUT_GPIO16, bit);
153}
154
155unsigned char spi_read(void)
156{
Markus Brunner772003e2008-03-05 21:38:12 +0100157 return (unsigned char)gpio_read_in_bit(SPI_DIN_GPIO15);
John Otkend4024bb2007-07-26 17:49:11 +0200158}
159
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200160int spi_cs_is_valid(unsigned int bus, unsigned int cs)
John Otkend4024bb2007-07-26 17:49:11 +0200161{
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200162 return bus == 0 && cs == 0;
John Otkend4024bb2007-07-26 17:49:11 +0200163}
164
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200165void spi_cs_activate(struct spi_slave *slave)
166{
167 gpio_write_bit(SPI_CS_GPIO0, 1);
168}
John Otkend4024bb2007-07-26 17:49:11 +0200169
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200170void spi_cs_deactivate(struct spi_slave *slave)
171{
172 gpio_write_bit(SPI_CS_GPIO0, 0);
173}
John Otkend4024bb2007-07-26 17:49:11 +0200174
175#ifdef CONFIG_PCI
176static unsigned char int_lines[32] = {
177 29, 30, 27, 28, 29, 30, 25, 27,
178 29, 30, 27, 28, 29, 30, 27, 28,
179 29, 30, 27, 28, 29, 30, 27, 28,
180 29, 30, 27, 28, 29, 30, 27, 28};
181
182static void taihu_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
183{
184 unsigned char int_line = int_lines[PCI_DEV(dev) & 31];
185
186 pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line);
187}
188
189int pci_pre_init(struct pci_controller *hose)
190{
191 hose->fixup_irq = taihu_pci_fixup_irq;
192 return 1;
193}
194#endif /* CONFIG_PCI */
Ben Warren10efa022008-08-31 20:37:00 -0700195
196int board_eth_init(bd_t *bis)
197{
198 return pci_eth_init(bis);
199}