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wdenk2262cfe2002-11-18 00:14:45 +00001/*
2 * (C) Copyright 2002
Albert ARIBAUDfa82f872011-08-04 18:45:45 +02003 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
wdenk2262cfe2002-11-18 00:14:45 +00004 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk2262cfe2002-11-18 00:14:45 +00006 */
7
8#ifndef _PCI_I386_H_
Gabe Black452f50f2012-10-10 13:12:57 +00009#define _PCI_I386_H_
wdenk2262cfe2002-11-18 00:14:45 +000010
Bin Meng3c8ae532015-02-02 22:35:25 +080011/* bus mapping constants (used for PCI core initialization) */
12#define PCI_REG_ADDR 0xcf8
13#define PCI_REG_DATA 0xcfc
14
15#define PCI_CFG_EN 0x80000000
16
17#ifndef __ASSEMBLY__
18
Graeme Russ83088af2011-11-08 02:33:15 +000019#define DEFINE_PCI_DEVICE_TABLE(_table) \
20 const struct pci_device_id _table[]
21
Simon Glassd188b182014-11-12 22:42:11 -070022struct pci_controller;
23
Graeme Russ1cfcf032011-11-08 02:33:22 +000024void pci_setup_type1(struct pci_controller *hose);
Simon Glassd188b182014-11-12 22:42:11 -070025
26/**
27 * board_pci_setup_hose() - Set up the PCI hose
28 *
29 * This is called by the common x86 PCI code to set up the PCI controller
30 * hose. It may be called when no memory/BSS is available so should just
31 * store things in 'hose' and not in BSS variables.
32 */
33void board_pci_setup_hose(struct pci_controller *hose);
Simon Glass7430f102014-11-12 22:42:12 -070034
35/**
36 * pci_early_init_hose() - Set up PCI host before relocation
37 *
38 * This allocates memory for, sets up and returns the PCI hose. It can be
Bin Meng8f9052f2014-12-30 22:53:21 +080039 * called before relocation. The hose will be stored in gd->hose for
Simon Glass7430f102014-11-12 22:42:12 -070040 * later use, but will become invalid one DRAM is available.
41 */
42int pci_early_init_hose(struct pci_controller **hosep);
Simon Glass6fb3b722014-11-12 22:42:14 -070043
Simon Glasse94ea6f2014-11-14 18:18:28 -070044int board_pci_pre_scan(struct pci_controller *hose);
45int board_pci_post_scan(struct pci_controller *hose);
46
Simon Glass6fb3b722014-11-12 22:42:14 -070047/*
48 * Simple PCI access routines - these work from either the early PCI hose
49 * or the 'real' one, created after U-Boot has memory available
50 */
51unsigned int pci_read_config8(pci_dev_t dev, unsigned where);
52unsigned int pci_read_config16(pci_dev_t dev, unsigned where);
53unsigned int pci_read_config32(pci_dev_t dev, unsigned where);
54
55void pci_write_config8(pci_dev_t dev, unsigned where, unsigned value);
56void pci_write_config16(pci_dev_t dev, unsigned where, unsigned value);
57void pci_write_config32(pci_dev_t dev, unsigned where, unsigned value);
58
Bin Meng3c8ae532015-02-02 22:35:25 +080059#endif /* __ASSEMBLY__ */
60
61#endif /* _PCI_I386_H_ */