blob: c18e71a3c23fbac9a4cfbb150fb032c28f11d638 [file] [log] [blame]
Steve Sakoman3e76d622010-06-08 13:07:46 -07001/*
2 * (C) Copyright 2010
3 * Texas Instruments Incorporated.
4 * Aneesh V <aneesh@ti.com>
5 * Steve Sakoman <steve@sakoman.com>
6 *
7 * Configuration settings for the TI SDP4430 board.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*
32 * High Level Configuration Options
33 */
34#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
35#define CONFIG_OMAP 1 /* in a TI OMAP core */
36#define CONFIG_OMAP44XX 1 /* which is a 44XX */
37#define CONFIG_OMAP4430 1 /* which is in a 4430 */
38#define CONFIG_4430SDP 1 /* working with SDP */
Steve Sakoman2ad853c2010-07-15 13:43:10 -070039#define CONFIG_ARCH_CPU_INIT
Steve Sakoman3e76d622010-06-08 13:07:46 -070040
41/* Get CPU defs */
42#include <asm/arch/cpu.h>
43#include <asm/arch/omap4.h>
44
45/* Display CPU and Board Info */
46#define CONFIG_DISPLAY_CPUINFO 1
47#define CONFIG_DISPLAY_BOARDINFO 1
48
49/* Keep L2 Cache Disabled */
50#define CONFIG_L2_OFF 1
51
52/* Clock Defines */
53#define V_OSCK 38400000 /* Clock output from T2 */
54#define V_SCLK V_OSCK
55
56#undef CONFIG_USE_IRQ /* no support for IRQs */
57#define CONFIG_MISC_INIT_R
58
59#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
60#define CONFIG_SETUP_MEMORY_TAGS 1
61#define CONFIG_INITRD_TAG 1
62#define CONFIG_REVISION_TAG 1
63
64/*
65 * Size of malloc() pool
66 * Total Size Environment - 256k
67 * Malloc - add 256k
68 */
69#define CONFIG_ENV_SIZE (256 << 10)
70#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
71#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
72 /* initial data */
73/* Vector Base */
74#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
75
76/*
77 * Hardware drivers
78 */
79
80/*
81 * serial port - NS16550 compatible
82 */
83#define V_NS16550_CLK 48000000
84
85#define CONFIG_SYS_NS16550
86#define CONFIG_SYS_NS16550_SERIAL
87#define CONFIG_SYS_NS16550_REG_SIZE (-4)
88#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
89#define CONFIG_CONS_INDEX 3
90#define CONFIG_SYS_NS16550_COM3 UART3_BASE
91
92#define CONFIG_ENV_IS_NOWHERE
93#define CONFIG_ENV_OVERWRITE
94#define CONFIG_BAUDRATE 115200
95#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
96 115200}
97
98/* I2C */
99#define CONFIG_HARD_I2C 1
100#define CONFIG_SYS_I2C_SPEED 100000
101#define CONFIG_SYS_I2C_SLAVE 1
102#define CONFIG_SYS_I2C_BUS 0
103#define CONFIG_SYS_I2C_BUS_SELECT 1
104#define CONFIG_DRIVER_OMAP34XX_I2C 1
105#define CONFIG_I2C_MULTI_BUS 1
106
Steve Sakoman516799f2010-07-15 12:53:42 -0700107/* TWL6030 */
108#define CONFIG_TWL6030_POWER 1
109
Steve Sakoman3e76d622010-06-08 13:07:46 -0700110/* MMC */
111#define CONFIG_MMC 1
112#define CONFIG_OMAP3_MMC 1
113#define CONFIG_SYS_MMC_SET_DEV 1
114#define CONFIG_DOS_PARTITION 1
115
116/* Flash */
117#define CONFIG_SYS_NO_FLASH 1
118
119/* commands to include */
120#include <config_cmd_default.h>
121
122/* Enabled commands */
123#define CONFIG_CMD_EXT2 /* EXT2 Support */
124#define CONFIG_CMD_FAT /* FAT support */
125#define CONFIG_CMD_I2C /* I2C serial bus support */
126#define CONFIG_CMD_MMC /* MMC support */
127
128/* Disabled commands */
129#undef CONFIG_CMD_NET
130#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
131#undef CONFIG_CMD_IMLS /* List all found images */
132
133/*
134 * Enabling relocation of u-boot by default
135 * Relocation can be skipped if u-boot is copied to the TEXT_BASE
136 */
137#undef CONFIG_SKIP_RELOCATE_UBOOT
138
139/*
140 * Environment setup
141 */
142
143/* allow overwriting serial config and ethaddr */
144#define CONFIG_ENV_OVERWRITE
145
146#define CONFIG_EXTRA_ENV_SETTINGS \
147 "loadaddr=0x82000000\0" \
148 "console=ttyS2,115200n8\0" \
149 "mmcdev=1\0" \
150 "mmcroot=/dev/mmcblk0p2 rw\0" \
151 "mmcrootfstype=ext3 rootwait\0" \
152 "mmcargs=setenv bootargs console=${console} " \
153 "root=${mmcroot} " \
154 "rootfstype=${mmcrootfstype}\0" \
155 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
156 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
157 "source ${loadaddr}\0" \
158 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
159 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
160 "run mmcargs; " \
161 "bootm ${loadaddr}\0" \
162
163#define CONFIG_BOOTCOMMAND \
164 "if mmc init ${mmcdev}; then " \
165 "if run loadbootscript; then " \
166 "run bootscript; " \
167 "else " \
168 "if run loaduimage; then " \
169 "run mmcboot; " \
170 "else run nandboot; " \
171 "fi; " \
172 "fi; " \
173 "fi"
174
175#define CONFIG_AUTO_COMPLETE 1
176
177/*
178 * Miscellaneous configurable options
179 */
180
181#define CONFIG_SYS_LONGHELP /* undef to save memory */
182#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
183#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
184#define CONFIG_SYS_PROMPT "OMAP4430 SDP # "
185#define CONFIG_SYS_CBSIZE 256
186/* Print Buffer Size */
187#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
188 sizeof(CONFIG_SYS_PROMPT) + 16)
189#define CONFIG_SYS_MAXARGS 16
190/* Boot Argument Buffer Size */
191#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
192
193/*
194 * memtest setup
195 */
196#define CONFIG_SYS_MEMTEST_START 0x80000000
197#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
198
199/* Default load address */
200#define CONFIG_SYS_LOAD_ADDR 0x80000000
201
202/* Use General purpose timer 1 */
Steve Sakoman674e0b22010-07-20 14:56:07 -0700203#define CONFIG_SYS_TIMERBASE GPT2_BASE
Steve Sakoman3e76d622010-06-08 13:07:46 -0700204#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
205#define CONFIG_SYS_HZ 1000
206
207/*
208 * Stack sizes
209 *
210 * The stack sizes are set up in start.S using the settings below
211 */
212#define CONFIG_STACKSIZE (128 << 10) /* Regular stack */
213#ifdef CONFIG_USE_IRQ
214#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */
215#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */
216#endif
217
218/*
219 * SDRAM Memory Map
220 * Even though we use two CS all the memory
221 * is mapped to one contiguous block
222 */
223#define CONFIG_NR_DRAM_BANKS 1
224
225#endif /* __CONFIG_H */