Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * AM625 SK dts file for R5 SPL |
| 4 | * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ |
| 5 | */ |
| 6 | |
| 7 | #include "k3-am625-sk.dts" |
| 8 | #include "k3-am62x-sk-ddr4-1600MTs.dtsi" |
| 9 | #include "k3-am62-ddr.dtsi" |
| 10 | |
| 11 | #include "k3-am625-sk-u-boot.dtsi" |
| 12 | |
| 13 | / { |
| 14 | aliases { |
| 15 | remoteproc0 = &sysctrler; |
| 16 | remoteproc1 = &a53_0; |
| 17 | serial0 = &wkup_uart0; |
| 18 | serial3 = &main_uart1; |
| 19 | }; |
| 20 | |
Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 21 | a53_0: a53@0 { |
| 22 | compatible = "ti,am654-rproc"; |
| 23 | reg = <0x00 0x00a90000 0x00 0x10>; |
| 24 | power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, |
Manorit Chawdhry | 53f02be | 2023-04-14 09:47:59 +0530 | [diff] [blame] | 25 | <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, |
| 26 | <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>; |
Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 27 | resets = <&k3_reset 135 0>; |
| 28 | clocks = <&k3_clks 61 0>; |
| 29 | assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; |
| 30 | assigned-clock-parents = <&k3_clks 61 2>; |
| 31 | assigned-clock-rates = <200000000>, <1200000000>; |
| 32 | ti,sci = <&dmsc>; |
| 33 | ti,sci-proc-id = <32>; |
| 34 | ti,sci-host-id = <10>; |
Simon Glass | 8c103c3 | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 35 | bootph-pre-ram; |
Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 36 | }; |
| 37 | |
| 38 | dm_tifs: dm-tifs { |
| 39 | compatible = "ti,j721e-dm-sci"; |
| 40 | ti,host-id = <36>; |
| 41 | ti,secure-host; |
| 42 | mbox-names = "rx", "tx"; |
| 43 | mboxes= <&secure_proxy_main 22>, |
| 44 | <&secure_proxy_main 23>; |
Simon Glass | 8c103c3 | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 45 | bootph-pre-ram; |
Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 46 | }; |
| 47 | }; |
| 48 | |
| 49 | &dmsc { |
| 50 | mboxes= <&secure_proxy_main 0>, |
| 51 | <&secure_proxy_main 1>, |
| 52 | <&secure_proxy_main 0>; |
| 53 | mbox-names = "rx", "tx", "notify"; |
| 54 | ti,host-id = <35>; |
| 55 | ti,secure-host; |
| 56 | }; |
| 57 | |
Nishanth Menon | 7937af1 | 2023-07-27 04:03:31 -0500 | [diff] [blame] | 58 | &secure_proxy_sa3 { |
Nishanth Menon | 7937af1 | 2023-07-27 04:03:31 -0500 | [diff] [blame] | 59 | /* We require this for boot handshake */ |
| 60 | status = "okay"; |
| 61 | }; |
| 62 | |
Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 63 | &cbass_main { |
Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 64 | sysctrler: sysctrler { |
| 65 | compatible = "ti,am654-system-controller"; |
Nishanth Menon | 7937af1 | 2023-07-27 04:03:31 -0500 | [diff] [blame] | 66 | mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>; |
Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 67 | mbox-names = "tx", "rx", "boot_notify"; |
Simon Glass | 8c103c3 | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 68 | bootph-pre-ram; |
Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 69 | }; |
Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 70 | }; |
| 71 | |
Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 72 | /* WKUP UART0 is used for DM firmware logs */ |
| 73 | &wkup_uart0 { |
Nishanth Menon | b1c7fa0 | 2023-11-14 21:28:57 -0600 | [diff] [blame] | 74 | status = "okay"; |
Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 75 | }; |
| 76 | |
| 77 | /* Main UART1 is used for TIFS firmware logs */ |
| 78 | &main_uart1 { |
Nishanth Menon | b1c7fa0 | 2023-11-14 21:28:57 -0600 | [diff] [blame] | 79 | status = "okay"; |
Nishanth Menon | 3e48d37 | 2022-05-25 13:38:48 +0530 | [diff] [blame] | 80 | }; |
Dhruva Gole | 8994ac3 | 2022-10-27 20:23:10 +0530 | [diff] [blame] | 81 | |
| 82 | &ospi0 { |
| 83 | reg = <0x00 0x0fc40000 0x00 0x100>, |
| 84 | <0x00 0x60000000 0x00 0x08000000>; |
| 85 | }; |