blob: 886ea04e2ec255a5e8fee617b54b6e0f1ce72a37 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Stephen Warrenfe60f062016-09-13 10:45:58 -06002/*
3 * Copyright (c) 2016, NVIDIA CORPORATION.
Stephen Warrenfe60f062016-09-13 10:45:58 -06004 */
5
6#include <common.h>
7#include <dm.h>
8#include <reset-uclass.h>
9#include <asm/arch/clock.h>
10#include <asm/arch-tegra/clk_rst.h>
11
12static int tegra_car_reset_request(struct reset_ctl *reset_ctl)
13{
14 debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
15 reset_ctl->dev, reset_ctl->id);
16
17 /* PERIPH_ID_COUNT varies per SoC */
18 if (reset_ctl->id >= PERIPH_ID_COUNT)
19 return -EINVAL;
20
21 return 0;
22}
23
24static int tegra_car_reset_free(struct reset_ctl *reset_ctl)
25{
26 debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
27 reset_ctl->dev, reset_ctl->id);
28
29 return 0;
30}
31
32static int tegra_car_reset_assert(struct reset_ctl *reset_ctl)
33{
34 debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
35 reset_ctl->dev, reset_ctl->id);
36
37 reset_set_enable(reset_ctl->id, 1);
38
39 return 0;
40}
41
42static int tegra_car_reset_deassert(struct reset_ctl *reset_ctl)
43{
44 debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
45 reset_ctl->dev, reset_ctl->id);
46
47 reset_set_enable(reset_ctl->id, 0);
48
49 return 0;
50}
51
52struct reset_ops tegra_car_reset_ops = {
53 .request = tegra_car_reset_request,
Simon Glass94474b22020-02-03 07:35:52 -070054 .rfree = tegra_car_reset_free,
Stephen Warrenfe60f062016-09-13 10:45:58 -060055 .rst_assert = tegra_car_reset_assert,
56 .rst_deassert = tegra_car_reset_deassert,
57};
58
59static int tegra_car_reset_probe(struct udevice *dev)
60{
61 debug("%s(dev=%p)\n", __func__, dev);
62
63 return 0;
64}
65
66U_BOOT_DRIVER(tegra_car_reset) = {
67 .name = "tegra_car_reset",
68 .id = UCLASS_RESET,
69 .probe = tegra_car_reset_probe,
70 .ops = &tegra_car_reset_ops,
71};