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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Tom Warrenf01b6312012-12-11 13:34:18 +00002/*
3 * (C) Copyright 2010-2012
4 * NVIDIA Corporation <www.nvidia.com>
Tom Warrenf01b6312012-12-11 13:34:18 +00005 */
6
Tom Warrenbfcf46d2013-02-26 12:18:48 +00007#ifndef _TEGRA_COMMON_H_
8#define _TEGRA_COMMON_H_
Alexey Brodkin1ace4022014-02-26 17:47:58 +04009#include <linux/sizes.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000010#include <linux/stringify.h>
11
12/*
13 * High Level Configuration Options
14 */
Tom Warrenf01b6312012-12-11 13:34:18 +000015#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
16
Tom Warrenf01b6312012-12-11 13:34:18 +000017#include <asm/arch/tegra.h> /* get chip and board defs */
18
Thierry Redingf41f0a12015-07-28 11:35:54 +020019/* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
20#ifndef CONFIG_ARM64
Rob Herring31df9892013-10-04 10:22:47 -050021#define CONFIG_SYS_TIMER_RATE 1000000
22#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
Thierry Redingf41f0a12015-07-28 11:35:54 +020023#endif
Rob Herring31df9892013-10-04 10:22:47 -050024
Tom Warrenf01b6312012-12-11 13:34:18 +000025#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Tom Warrenf01b6312012-12-11 13:34:18 +000026
27/* Environment */
Tom Warrenf01b6312012-12-11 13:34:18 +000028#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
29
30/*
Tom Warrenbfcf46d2013-02-26 12:18:48 +000031 * NS16550 Configuration
Tom Warrenf01b6312012-12-11 13:34:18 +000032 */
Thomas Chou18746262015-11-19 21:48:11 +080033#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Tom Warrenf01b6312012-12-11 13:34:18 +000034
35/*
Stephen Warrenf1756032014-04-18 10:56:11 -060036 * Common HW configuration.
37 * If this varies between SoCs later, move to tegraNN-common.h
38 * Note: This is number of devices, not max device ID.
39 */
40#define CONFIG_SYS_MMC_MAX_DEVICE 4
41
Tom Warrenf01b6312012-12-11 13:34:18 +000042/* allow to overwrite serial and ethaddr */
43#define CONFIG_ENV_OVERWRITE
Tom Warrenf01b6312012-12-11 13:34:18 +000044
Tom Warrenf01b6312012-12-11 13:34:18 +000045/*
Tom Warrenf01b6312012-12-11 13:34:18 +000046 * Increasing the size of the IO buffer as default nfsargs size is more
47 * than 256 and so it is not possible to edit it
48 */
Bryan Wu64a4fe72016-09-01 23:49:57 +000049#define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */
Tom Warrenf01b6312012-12-11 13:34:18 +000050/* Print Buffer Size */
Bryan Wu64a4fe72016-09-01 23:49:57 +000051#define CONFIG_SYS_MAXARGS 64 /* max number of command args */
52
Tom Warrenf01b6312012-12-11 13:34:18 +000053/* Boot Argument Buffer Size */
54#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
55
56#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
57#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
58
Tom Warrenf01b6312012-12-11 13:34:18 +000059/*-----------------------------------------------------------------------
60 * Physical Memory Map
61 */
Tom Warrenf01b6312012-12-11 13:34:18 +000062#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
63#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
64
65#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
66#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
67
68#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
69
Stephen Warrenf0975322017-12-19 18:30:37 -070070#ifndef CONFIG_ARM64
Tom Warrenf01b6312012-12-11 13:34:18 +000071#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
72#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
73#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
74 CONFIG_SYS_INIT_RAM_SIZE - \
75 GENERATED_GBL_DATA_SIZE)
Stephen Warrenf0975322017-12-19 18:30:37 -070076#endif
Tom Warrenf01b6312012-12-11 13:34:18 +000077
Stephen Warren0d1bd152017-12-19 18:30:35 -070078#ifndef CONFIG_ARM64
Tom Warrenf01b6312012-12-11 13:34:18 +000079/* Defines for SPL */
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +000080#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
Tom Warrenf01b6312012-12-11 13:34:18 +000081 CONFIG_SPL_TEXT_BASE)
82#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
Stephen Warren0d1bd152017-12-19 18:30:35 -070083#endif
Tom Warrenf01b6312012-12-11 13:34:18 +000084
Tom Warrenf01b6312012-12-11 13:34:18 +000085#endif /* _TEGRA_COMMON_H_ */